From 550811bace6ef3c342052dc0403853852b54cf38 Mon Sep 17 00:00:00 2001 From: Xan Date: Wed, 25 Apr 2018 12:37:57 +0100 Subject: [PATCH] --- ...alysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn b/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn index 06bb1aae6..f470b2868 100644 --- a/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn +++ b/Comparative_analysis_Harmonised_RVP_vs_Andes_Packed_SIMD_ISA_proposal.mdwn @@ -1,6 +1,6 @@ # Comparative analysis of Andes Packed ISA proposal vs RVP Harmonised (with RV Vector spec) -## Proposed vector instruction encoding +## Proposed Harmonised RVP vector op instruction encoding Register x 2 -> register operations: -- 2.30.2