From 550820e16d0a1f44ee63086b1a2d931e04839ffa Mon Sep 17 00:00:00 2001 From: Andrew Burgess Date: Wed, 11 Nov 2020 11:55:08 +0000 Subject: [PATCH] gdb/riscv: add ability to decode dwarf CSR numbers Extends riscv_dwarf_reg_to_regnum to add the ability to convert the DWARF register numbers for CSRs into GDB's internal numbers. gdb/ChangeLog: * riscv-tdep.c (riscv_dwarf_reg_to_regnum): Decode DWARF CSR numbers. * riscv-tdep.h (RISCV_DWARF_FIRST_CSR, RISCV_DWARF_LAST_CSR): New enum values. --- gdb/ChangeLog | 7 +++++++ gdb/riscv-tdep.c | 3 +++ gdb/riscv-tdep.h | 2 ++ 3 files changed, 12 insertions(+) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 84fa1870604..e78a71721e8 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,10 @@ +2020-11-11 Andrew Burgess + + * riscv-tdep.c (riscv_dwarf_reg_to_regnum): Decode DWARF CSR + numbers. + * riscv-tdep.h (RISCV_DWARF_FIRST_CSR, RISCV_DWARF_LAST_CSR): New + enum values. + 2020-11-10 Tom Tromey * value.h (internalvar_name): Update. diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index e2270aa77db..4e255056863 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -3150,6 +3150,9 @@ riscv_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) else if (reg < RISCV_DWARF_REGNUM_F31) return RISCV_FIRST_FP_REGNUM + (reg - RISCV_DWARF_REGNUM_F0); + else if (reg >= RISCV_DWARF_FIRST_CSR && reg <= RISCV_DWARF_LAST_CSR) + return RISCV_FIRST_CSR_REGNUM + (reg - RISCV_DWARF_FIRST_CSR); + return -1; } diff --git a/gdb/riscv-tdep.h b/gdb/riscv-tdep.h index 0ff555b0632..5bd3314d450 100644 --- a/gdb/riscv-tdep.h +++ b/gdb/riscv-tdep.h @@ -63,6 +63,8 @@ enum RISCV_DWARF_REGNUM_X31 = 31, RISCV_DWARF_REGNUM_F0 = 32, RISCV_DWARF_REGNUM_F31 = 63, + RISCV_DWARF_FIRST_CSR = 4096, + RISCV_DWARF_LAST_CSR = 8191, }; /* RISC-V specific per-architecture information. */ -- 2.30.2