From 5534c4923d4919721d4d236af464a3ddf2e261bf Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 10 Sep 2022 13:25:53 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index 00e8fdc9a..809b4d324 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -45,10 +45,13 @@ Allocation of not just Simple-V but the 80-100 Scalar instructions all at the same time*. It is also critical to note that Simple-V **does not modify the Scalar -Power ISA in any way**. The sole semi-exception to that is Vectorised +Power ISA in any way** and neither must Vectorised instructions be +different from their Scalar words. +The sole exception to that is Vectorised Branch Conditional, in order to provide the usual Advanced Branching -capability present in every Commercial 3D GPU ISA. Scalar Branch is -**not** modified by the **Vectorised** variant. +capability present in every Commercial 3D GPU ISA, but it +is the *Vectorised* Branch-Conditional that is augmented, not Scalar +Branch. # Compliancy Levels -- 2.30.2