From 55364ba2f84a15c9292327d48ee850b797be35ca Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 19 Sep 2022 22:00:15 +0100 Subject: [PATCH] add bc_ctr and bc_cti but not used yet --- src/openpower/sv/trans/svp64.py | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py index 40fdc0ef..5fab53d1 100644 --- a/src/openpower/sv/trans/svp64.py +++ b/src/openpower/sv/trans/svp64.py @@ -1146,11 +1146,11 @@ class SVP64Asm: elif is_bc: if encmode == 'all': bc_all = 1 - elif encmode == 'st': # svstep mode - bc_step = 1 - elif encmode == 'sr': # svstep BRc mode - bc_step = 1 - bc_brc = 1 + elif encmode == 'ctr': # ctr-test mode + bc_ctr = 1 + elif encmode == 'cti': # ctr-test with inclusive mode + bc_ctr = 1 + bc_cti = 1 elif encmode == 'vs': # VLSET mode bc_vlset = 1 elif encmode == 'vsi': # VLSET mode with VLI (VL inclusives) -- 2.30.2