From 553d2079ad8687944cc1912217cecb09e30afba0 Mon Sep 17 00:00:00 2001 From: Matthew Poremba Date: Mon, 6 Apr 2020 13:09:32 -0500 Subject: [PATCH] arch-x86: Do not fixup faults in TLB Faults in the TLB ought to cause a page walk. Force that by removing the fixup in X86 TLB. This fixes rare race conditions where a timing page walk is intercepted by a TLB miss which fixes up the fault resulting in double calls to allocateMem in Process class. Change-Id: Iaef4d636cd2997144d8bc5012cd7c2a0a97102e5 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27507 Tested-by: kokoro Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- src/arch/x86/tlb.cc | 7 ------- 1 file changed, 7 deletions(-) diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 53492b033..baeeb66bd 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -397,13 +397,6 @@ TLB::translate(const RequestPtr &req, Process *p = tc->getProcessPtr(); const EmulationPageTable::Entry *pte = p->pTable->lookup(vaddr); - if (!pte && mode != Execute) { - // Check if we just need to grow the stack. - if (p->fixupFault(vaddr)) { - // If we did, lookup the entry for the new page. - pte = p->pTable->lookup(vaddr); - } - } if (!pte) { return std::make_shared(vaddr, true, mode, true, false); -- 2.30.2