From 55d1020090bd9e88a90769c7df36a4faf0f558c8 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 16 Apr 2021 01:28:29 +0100 Subject: [PATCH] put mbits back into segment_check (like it is in microwatt) --- src/soc/decoder/isa/radixmmu.py | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/soc/decoder/isa/radixmmu.py b/src/soc/decoder/isa/radixmmu.py index db8c8b20..f4603604 100644 --- a/src/soc/decoder/isa/radixmmu.py +++ b/src/soc/decoder/isa/radixmmu.py @@ -451,8 +451,7 @@ class RADIX: print("calling segment_check") - mbits = selectconcat(SelectableInt(0,1), mask_size) - shift = self._segment_check(addr, mbits, shift) + shift = self._segment_check(addr, mask_size, shift) print("shift", shift) if isinstance(addr, str): @@ -558,9 +557,9 @@ class RADIX: return rts, mbits - def _segment_check(self, addr, mbits, shift): + def _segment_check(self, addr, mask_size, shift): """checks segment valid - mbits := '0' & r.mask_size; + mbits := '0' & r.mask_size; v.shift := r.shift + (31 - 12) - mbits; nonzero := or(r.addr(61 downto 31) and not finalmask(30 downto 0)); if r.addr(63) /= r.addr(62) or nonzero = '1' then @@ -575,6 +574,7 @@ class RADIX: # note that SelectableInt does big-endian! so the indices # below *directly* match the spec, unlike microwatt which # has to turn them around (to LE) + mbits = selectconcat(SelectableInt(0,1), mask_size) mask = genmask(shift, 44) nonzero = addr[2:33] & mask[13:44] # mask 31 LSBs (BE numbered 13:44) print ("RADIX _segment_check nonzero", bin(nonzero.value)) @@ -584,7 +584,7 @@ class RADIX: limit = shift + (31 - 12) if mbits.value < 5 or mbits.value > 16 or mbits.value > limit.value: return "badtree" - new_shift = shift + (31 - 12) - mbits + new_shift = limit - mbits # TODO verify that returned result is correct return new_shift -- 2.30.2