From 55d2ee5737e56cec20646bc378cb7e7ad2ecb02d Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 14 Apr 2015 07:04:03 +0200 Subject: [PATCH] predicates.md (any_QIreg_operand): Rename from q_regs_operand. * config/i386/predicates.md (any_QIreg_operand): Rename from q_regs_operand. Do not process subregs. (QIreg_operand): Use QI_REGNO_P predicate. (ext_QIreg_operand): Ditto. (ext_register_operand): Ditto. * config/i386/i386.md (TEST splitters): Use QIreg_operand predicate. (AND splitters): Ditto. (AND with -65536 splitter): Add SWI48 mode for operand 0. (AND with -256 splitter): Use any_QIreg_operand predicate and SWI248 mode for operand 0. (AND with -65281 splitter): Use QIreg_operand predicate and SWI248 mode for operand 0. (SETCC + MOVZBL peepholes): Update for renamed any_QIreg_operand. From-SVN: r222076 --- gcc/ChangeLog | 16 +++++++++ gcc/config/i386/i386.md | 49 ++++++++++++--------------- gcc/config/i386/predicates.md | 64 ++++++++++++++++------------------- 3 files changed, 68 insertions(+), 61 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9205c136361..b1b06b3bf4e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +2015-04-14 Uros Bizjak + + * config/i386/predicates.md (any_QIreg_operand): Rename from + q_regs_operand. Do not process subregs. + (QIreg_operand): Use QI_REGNO_P predicate. + (ext_QIreg_operand): Ditto. + (ext_register_operand): Ditto. + * config/i386/i386.md (TEST splitters): Use QIreg_operand predicate. + (AND splitters): Ditto. + (AND with -65536 splitter): Add SWI48 mode for operand 0. + (AND with -256 splitter): Use any_QIreg_operand predicate and + SWI248 mode for operand 0. + (AND with -65281 splitter): Use QIreg_operand predicate and SWI248 + mode for operand 0. + (SETCC + MOVZBL peepholes): Update for renamed any_QIreg_operand. + 2015-04-13 Gerald Pfeifer * doc/plugins.texi: Rewrite first introductory paragraph. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 729db75584e..7195882f03d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -7661,11 +7661,10 @@ (define_split [(set (match_operand 0 "flags_reg_operand") (match_operator 1 "compare_operator" - [(and (match_operand 2 "register_operand") + [(and (match_operand 2 "QIreg_operand") (match_operand 3 "const_int_operand")) (const_int 0)]))] "reload_completed - && QI_REG_P (operands[2]) && GET_MODE (operands[2]) != QImode && ((ix86_match_ccmode (insn, CCZmode) && !(INTVAL (operands[3]) & ~(255 << 8))) @@ -8022,9 +8021,9 @@ }) (define_split - [(set (match_operand 0 "register_operand") - (and (match_dup 0) - (const_int -65536))) + [(set (match_operand:SWI48 0 "register_operand") + (and:SWI48 (match_dup 0) + (const_int -65536))) (clobber (reg:CC FLAGS_REG))] "(TARGET_FAST_PREFIX && !TARGET_PARTIAL_REG_STALL) || optimize_function_for_size_p (cfun)" @@ -8032,9 +8031,9 @@ "operands[1] = gen_lowpart (HImode, operands[0]);") (define_split - [(set (match_operand 0 "ext_register_operand") - (and (match_dup 0) - (const_int -256))) + [(set (match_operand:SWI248 0 "any_QIreg_operand") + (and:SWI248 (match_dup 0) + (const_int -256))) (clobber (reg:CC FLAGS_REG))] "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && reload_completed" @@ -8042,9 +8041,9 @@ "operands[1] = gen_lowpart (QImode, operands[0]);") (define_split - [(set (match_operand 0 "ext_register_operand") - (and (match_dup 0) - (const_int -65281))) + [(set (match_operand:SWI248 0 "QIreg_operand") + (and:SWI248 (match_dup 0) + (const_int -65281))) (clobber (reg:CC FLAGS_REG))] "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && reload_completed" @@ -8252,12 +8251,11 @@ ;; of memory mismatch stalls. We may want to do the splitting for optimizing ;; for size, but that can (should?) be handled by generic code instead. (define_split - [(set (match_operand 0 "register_operand") + [(set (match_operand 0 "QIreg_operand") (and (match_operand 1 "register_operand") (match_operand 2 "const_int_operand"))) (clobber (reg:CC FLAGS_REG))] "reload_completed - && QI_REG_P (operands[0]) && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && !(~INTVAL (operands[2]) & ~(255 << 8)) && GET_MODE (operands[0]) != QImode" @@ -8275,12 +8273,11 @@ ;; Since AND can be encoded with sign extended immediate, this is only ;; profitable when 7th bit is not set. (define_split - [(set (match_operand 0 "register_operand") + [(set (match_operand 0 "any_QIreg_operand") (and (match_operand 1 "general_operand") (match_operand 2 "const_int_operand"))) (clobber (reg:CC FLAGS_REG))] "reload_completed - && ANY_QI_REG_P (operands[0]) && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && !(~INTVAL (operands[2]) & ~255) && !(INTVAL (operands[2]) & 128) @@ -8620,12 +8617,11 @@ (set_attr "mode" "QI")]) (define_split - [(set (match_operand 0 "register_operand") + [(set (match_operand 0 "QIreg_operand") (any_or (match_operand 1 "register_operand") (match_operand 2 "const_int_operand"))) (clobber (reg:CC FLAGS_REG))] "reload_completed - && QI_REG_P (operands[0]) && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && !(INTVAL (operands[2]) & ~(255 << 8)) && GET_MODE (operands[0]) != QImode" @@ -8643,12 +8639,11 @@ ;; Since OR can be encoded with sign extended immediate, this is only ;; profitable when 7th bit is set. (define_split - [(set (match_operand 0 "register_operand") + [(set (match_operand 0 "any_QIreg_operand") (any_or (match_operand 1 "general_operand") (match_operand 2 "const_int_operand"))) (clobber (reg:CC FLAGS_REG))] "reload_completed - && ANY_QI_REG_P (operands[0]) && (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)) && !(INTVAL (operands[2]) & ~255) && (INTVAL (operands[2]) & 128) @@ -9574,7 +9569,7 @@ case TYPE_ALU: gcc_assert (operands[2] == const1_rtx); - if (REG_P (operands[1]) && !ANY_QI_REG_P (operands[1])) + if (REG_P (operands[1]) && !ANY_QI_REGNO_P (REGNO (operands[1]))) return "add{l}\t%k0, %k0"; else return "add{b}\t%0, %0"; @@ -11567,7 +11562,7 @@ (set (match_operand:QI 1 "register_operand") (match_operator:QI 2 "ix86_comparison_operator" [(reg FLAGS_REG) (const_int 0)])) - (set (match_operand 3 "q_regs_operand") + (set (match_operand 3 "any_QIreg_operand") (zero_extend (match_dup 1)))] "(peep2_reg_dead_p (3, operands[1]) || operands_match_p (operands[1], operands[3])) @@ -11587,7 +11582,7 @@ (set (match_operand:QI 1 "register_operand") (match_operator:QI 2 "ix86_comparison_operator" [(reg FLAGS_REG) (const_int 0)])) - (set (match_operand 3 "q_regs_operand") + (set (match_operand 3 "any_QIreg_operand") (zero_extend (match_dup 1)))] "(peep2_reg_dead_p (3, operands[1]) || operands_match_p (operands[1], operands[3])) @@ -11609,7 +11604,7 @@ (set (match_operand:QI 1 "register_operand") (match_operator:QI 2 "ix86_comparison_operator" [(reg FLAGS_REG) (const_int 0)])) - (parallel [(set (match_operand:SI 3 "q_regs_operand") + (parallel [(set (match_operand:SI 3 "any_QIreg_operand") (and:SI (match_dup 3) (const_int 255))) (clobber (reg:CC FLAGS_REG))])] "REGNO (operands[1]) == REGNO (operands[3]) @@ -11629,7 +11624,7 @@ (set (match_operand:QI 1 "register_operand") (match_operator:QI 2 "ix86_comparison_operator" [(reg FLAGS_REG) (const_int 0)])) - (parallel [(set (match_operand 3 "q_regs_operand") + (parallel [(set (match_operand 3 "any_QIreg_operand") (zero_extend (match_dup 1))) (clobber (reg:CC FLAGS_REG))])] "(peep2_reg_dead_p (3, operands[1]) @@ -17454,7 +17449,7 @@ (match_operator 1 "compare_operator" [(and:SI (zero_extract:SI - (match_operand 2 "ext_register_operand") + (match_operand 2 "QIreg_operand") (const_int 8) (const_int 8)) (match_operand 3 "const_int_operand")) @@ -17599,7 +17594,7 @@ && !reg_overlap_mentioned_p (operands[0], operands[2]) && (mode != QImode || immediate_operand (operands[2], QImode) - || q_regs_operand (operands[2], QImode)) + || any_QIreg_operand (operands[2], QImode)) && ix86_match_ccmode (peep2_next_insn (3), (GET_CODE (operands[3]) == PLUS || GET_CODE (operands[3]) == MINUS) @@ -17659,7 +17654,7 @@ && peep2_reg_dead_p (4, operands[0]) && (mode != QImode || immediate_operand (operands[2], SImode) - || q_regs_operand (operands[2], SImode)) + || any_QIreg_operand (operands[2], SImode)) && !reg_overlap_mentioned_p (operands[0], operands[1]) && !reg_overlap_mentioned_p (operands[0], operands[2]) && ix86_match_ccmode (peep2_next_insn (3), diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 0f314ccb0e3..136a3887aca 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -62,19 +62,31 @@ (and (match_code "reg") (match_test "MASK_REGNO_P (REGNO (op))"))) -;; True if the operand is a Q_REGS class register. -(define_predicate "q_regs_operand" - (match_operand 0 "register_operand") -{ - if (GET_CODE (op) == SUBREG) - op = SUBREG_REG (op); - return ANY_QI_REG_P (op); -}) +;; Return true if op is a QImode register. +(define_predicate "any_QIreg_operand" + (and (match_code "reg") + (match_test "ANY_QI_REGNO_P (REGNO (op))"))) -;; Return true if OP is a memory operands that can be used in sibcalls. -(define_predicate "sibcall_memory_operand" - (and (match_operand 0 "memory_operand") - (match_test "CONSTANT_P (XEXP (op, 0))"))) +;; Return true if op is one of QImode registers: %[abcd][hl]. +(define_predicate "QIreg_operand" + (and (match_code "reg") + (match_test "QI_REGNO_P (REGNO (op))"))) + +;; Return true if op is a QImode register operand other than %[abcd][hl]. +(define_predicate "ext_QIreg_operand" + (and (match_test "TARGET_64BIT") + (match_code "reg") + (not (match_test "QI_REGNO_P (REGNO (op))")))) + +;; Return true if op is the AX register. +(define_predicate "ax_reg_operand" + (and (match_code "reg") + (match_test "REGNO (op) == AX_REG"))) + +;; Return true if op is the flags register. +(define_predicate "flags_reg_operand" + (and (match_code "reg") + (match_test "REGNO (op) == FLAGS_REG"))) ;; Match an SI or HImode register for a zero_extract. (define_special_predicate "ext_register_operand" @@ -88,7 +100,7 @@ /* Be careful to accept only registers having upper parts. */ return (REG_P (op) - && (REGNO (op) > LAST_VIRTUAL_REGISTER || REGNO (op) <= BX_REG)); + && (REGNO (op) > LAST_VIRTUAL_REGISTER || QI_REGNO_P (REGNO (op)))); }) ;; Match nonimmediate operands, but exclude memory operands on 64bit targets. @@ -103,27 +115,6 @@ (match_operand 0 "nonmemory_operand") (match_operand 0 "general_operand"))) -;; Return true if op is the AX register. -(define_predicate "ax_reg_operand" - (and (match_code "reg") - (match_test "REGNO (op) == AX_REG"))) - -;; Return true if op is the flags register. -(define_predicate "flags_reg_operand" - (and (match_code "reg") - (match_test "REGNO (op) == FLAGS_REG"))) - -;; Return true if op is one of QImode registers: %[abcd][hl]. -(define_predicate "QIreg_operand" - (match_test "QI_REG_P (op)")) - -;; Return true if op is a QImode register operand other than -;; %[abcd][hl]. -(define_predicate "ext_QIreg_operand" - (and (match_code "reg") - (match_test "TARGET_64BIT") - (match_test "REGNO (op) > BX_REG"))) - ;; Return true if VALUE is symbol reference (define_predicate "symbol_operand" (match_code "symbol_ref")) @@ -604,6 +595,11 @@ (and (not (match_test "TARGET_X32")) (match_operand 0 "memory_operand")))) +;; Return true if OP is a memory operands that can be used in sibcalls. +(define_predicate "sibcall_memory_operand" + (and (match_operand 0 "memory_operand") + (match_test "CONSTANT_P (XEXP (op, 0))"))) + ;; Test for a valid operand for a call instruction. ;; Allow constant call address operands in Pmode only. (define_special_predicate "call_insn_operand" -- 2.30.2