From 5660e188345f4acf0a72900ba6d81a5e02091e7b Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 9 Nov 2018 04:35:19 +0000 Subject: [PATCH] add mulhsu elwidth variant --- riscv/sv_insn_redirect.cc | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index b6312ad..6f9579d 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -623,7 +623,7 @@ sv_reg_t sv_proc_t::rv_mulhu(sv_reg_t const & lhs, sv_reg_t const & rhs) uint64_t vrhs = 0; if (rv_int_op_prepare(lhs, rhs, vlhs, vrhs, bitwidth)) { sv_reg_t result = (lhs * rhs) >> 32; - fprintf(stderr, "mul result %lx %lx %lx\n", + fprintf(stderr, "mulhu result %lx %lx %lx\n", (uint64_t)lhs, (uint64_t)rhs, (uint64_t)result); return result; } @@ -637,7 +637,21 @@ sv_reg_t sv_proc_t::rv_mulhu(sv_reg_t const & lhs, sv_reg_t const & rhs) sv_sreg_t sv_proc_t::rv_mulhsu(sv_sreg_t const & lhs, sv_reg_t const & rhs) { - return rv_mul(lhs, rhs) >> 32; + uint8_t bitwidth = _insn->src_bitwidth; + int64_t vlhs = 0; + uint64_t vrhs = 0; + if (rv_int_op_prepare(lhs, rhs, vlhs, vrhs, bitwidth)) { + sv_sreg_t result = (lhs * rhs) >> 32; + fprintf(stderr, "mulhsu result %lx %lx %lx\n", + (int64_t)lhs, (uint64_t)rhs, (int64_t)result); + return result; + } + uint8_t bw32 = std::min(bitwidth, (uint8_t)32); + int64_t result = (vlhs * vrhs) >> bw32; + result = sext_bwid(result, bw32); + fprintf(stderr, "mulhu result %lx %lx %lx bw %d\n", + (int64_t)lhs, (uint64_t)rhs, (int64_t)(result), bitwidth); + return rv_int_op_finish(lhs, rhs, result, bitwidth); } sv_sreg_t sv_proc_t::rv_mulh(sv_sreg_t const & lhs, sv_sreg_t const & rhs) -- 2.30.2