From 56dc4d15c417a62c298d31654d1be448b49c364a Mon Sep 17 00:00:00 2001 From: Jim Wilson Date: Mon, 15 Mar 1999 15:08:51 +0000 Subject: [PATCH] mips.h (REGISTER_MOVE_COST): Make the cost of moving from HI/LO/HILO/MD into general registers the same as... Mon Mar 15 16:01:52 1999 Jim Wilson * config/misp/mips.h (REGISTER_MOVE_COST): Make the cost of moving from HI/LO/HILO/MD into general registers the same as for one of moving general registers to HI/LO/HILO/MD. From-SVN: r25792 --- gcc/ChangeLog | 6 ++++++ gcc/config/mips/mips.h | 18 ++++++++++++++++-- 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c26f9d06d65..63c8e639971 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +Mon Mar 15 16:01:52 1999 Jim Wilson + + * config/misp/mips.h (REGISTER_MOVE_COST): Make the cost of moving + from HI/LO/HILO/MD into general registers the same as for one + of moving general registers to HI/LO/HILO/MD. + Mon Mar 15 12:39:38 1999 Nick Clifton * config/m32r/m32r.c (init_idents): New function. Initialise diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 6fa583f723c..b6d1dcf3310 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -3617,7 +3617,21 @@ while (0) that the constraints of the insn are met. Setting a cost of other than 2 will allow reload to verify that the constraints are met. You should do this if the `movM' pattern's constraints do - not allow such copying. */ + not allow such copying. + + ??? We make make the cost of moving from HI/LO/HILO/MD into general + registers the same as for one of moving general registers to + HI/LO/HILO/MD for TARGET_MIPS16 in order to prevent allocating a + pseudo to HI/LO/HILO/MD. This might hurt optimizations though, it + isn't clear if it is wise. And it might not work in all cases. We + could solve the DImode LO reg problem by using a multiply, just like + reload_{in,out}si. We could solve the SImode/HImode HI reg problem + by using divide instructions. divu puts the remainder in the HI + reg, so doing a divide by -1 will move the value in the HI reg for + all values except -1. We could handle that case by using a signed + divide, e.g. -1 / 2 (or maybe 1 / -2?). We'd have to emit a + compare/branch to test the input value to see which instruction we + need to use. This gets pretty messy, but it is feasible. */ #define REGISTER_MOVE_COST(FROM, TO) \ ((FROM) == M16_REGS && GR_REG_CLASS_P (TO) ? 2 \ @@ -3633,7 +3647,7 @@ while (0) && ((TO) == M16_REGS || (TO) == M16_NA_REGS)) ? 6 \ : (((FROM) == HI_REG || (FROM) == LO_REG \ || (FROM) == MD_REGS || (FROM) == HILO_REG) \ - && GR_REG_CLASS_P (TO)) ? (TARGET_MIPS16 ? 8 : 6) \ + && GR_REG_CLASS_P (TO)) ? (TARGET_MIPS16 ? 12 : 6) \ : (((TO) == HI_REG || (TO) == LO_REG \ || (TO) == MD_REGS || (TO) == HILO_REG) \ && GR_REG_CLASS_P (FROM)) ? (TARGET_MIPS16 ? 12 : 6) \ -- 2.30.2