From 5743bea0ba1eda07be831d95c5b7729f9ba98a92 Mon Sep 17 00:00:00 2001 From: Paul Berry Date: Sun, 17 Feb 2013 09:09:45 -0800 Subject: [PATCH] i965/vs: move VS-specific data members to vs_vec4_visitor. This patch moves the following data structures from vec4_visitor to vec4_vs_visitor, since they contain VS-specific data: - struct brw_vs_compile *c (renamed to vs_compile) - struct brw_vs_prog_data *prog_data (renamed to vs_prog_data) - src_reg *vp_temp_regs - src_reg vp_addr_reg Since brw_vs_compile and brw_vs_prog_data also contain vec4-generic data, the following pointers are added to the base class, to allow it to access the vec4-generic portions of these data structures: - struct brw_vec4_compile *c - struct brw_vec4_prog_key *key - struct brw_vec4_prog_data *prog_data Reviewed-by: Jordan Justen Reviewed-by: Eric Anholt v2: Use shorter names in the base class and longer names in the derived class. Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 38 ++++----- src/mesa/drivers/dri/i965/brw_vec4.h | 23 +++-- .../dri/i965/brw_vec4_reg_allocate.cpp | 12 +-- .../drivers/dri/i965/brw_vec4_visitor.cpp | 84 ++++++++++--------- src/mesa/drivers/dri/i965/brw_vec4_vp.cpp | 20 +++-- .../dri/i965/test_vec4_register_coalesce.cpp | 12 ++- 6 files changed, 101 insertions(+), 88 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 92fa16ac0f2..3148f308d31 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -423,8 +423,8 @@ vec4_visitor::pack_uniform_registers() /* Move the references to the data */ for (int j = 0; j < size; j++) { - prog_data->base.param[dst * 4 + new_chan[src] + j] = - prog_data->base.param[src * 4 + j]; + prog_data->param[dst * 4 + new_chan[src] + j] = + prog_data->param[src * 4 + j]; } this->uniform_vector_size[dst] += size; @@ -575,16 +575,16 @@ vec4_visitor::move_push_constants_to_pull_constants() pull_constant_loc[i / 4] = -1; if (i >= max_uniform_components) { - const float **values = &prog_data->base.param[i]; + const float **values = &prog_data->param[i]; /* Try to find an existing copy of this uniform in the pull * constants if it was part of an array access already. */ - for (unsigned int j = 0; j < prog_data->base.nr_pull_params; j += 4) { + for (unsigned int j = 0; j < prog_data->nr_pull_params; j += 4) { int matches; for (matches = 0; matches < 4; matches++) { - if (prog_data->base.pull_param[j + matches] != values[matches]) + if (prog_data->pull_param[j + matches] != values[matches]) break; } @@ -595,11 +595,11 @@ vec4_visitor::move_push_constants_to_pull_constants() } if (pull_constant_loc[i / 4] == -1) { - assert(prog_data->base.nr_pull_params % 4 == 0); - pull_constant_loc[i / 4] = prog_data->base.nr_pull_params / 4; + assert(prog_data->nr_pull_params % 4 == 0); + pull_constant_loc[i / 4] = prog_data->nr_pull_params / 4; for (int j = 0; j < 4; j++) { - prog_data->base.pull_param[prog_data->base.nr_pull_params++] = values[j]; + prog_data->pull_param[prog_data->nr_pull_params++] = values[j]; } } } @@ -659,7 +659,7 @@ vec4_visitor::opt_set_dependency_control() cfg_t cfg(this); - assert(prog_data->base.total_grf || + assert(prog_data->total_grf || !"Must be called after register allocation"); for (int i = 0; i < cfg.num_blocks; i++) { @@ -1192,7 +1192,7 @@ vec4_vs_visitor::setup_attributes(int payload_reg) nr_attributes = 0; for (int i = 0; i < VERT_ATTRIB_MAX; i++) { - if (prog_data->inputs_read & BITFIELD64_BIT(i)) { + if (vs_prog_data->inputs_read & BITFIELD64_BIT(i)) { attribute_map[i] = payload_reg + nr_attributes; nr_attributes++; } @@ -1202,7 +1202,7 @@ vec4_vs_visitor::setup_attributes(int payload_reg) * don't represent it with a flag in inputs_read, so we call it * VERT_ATTRIB_MAX. */ - if (prog_data->uses_vertexid) { + if (vs_prog_data->uses_vertexid) { attribute_map[VERT_ATTRIB_MAX] = payload_reg + nr_attributes; nr_attributes++; } @@ -1247,15 +1247,15 @@ vec4_vs_visitor::setup_attributes(int payload_reg) if (nr_attributes == 0) nr_attributes = 1; - prog_data->base.urb_read_length = (nr_attributes + 1) / 2; + prog_data->urb_read_length = (nr_attributes + 1) / 2; unsigned vue_entries = - MAX2(nr_attributes, prog_data->base.vue_map.num_slots); + MAX2(nr_attributes, prog_data->vue_map.num_slots); if (intel->gen == 6) - prog_data->base.urb_entry_size = ALIGN(vue_entries, 8) / 8; + prog_data->urb_entry_size = ALIGN(vue_entries, 8) / 8; else - prog_data->base.urb_entry_size = ALIGN(vue_entries, 4) / 4; + prog_data->urb_entry_size = ALIGN(vue_entries, 4) / 4; return payload_reg + nr_attributes; } @@ -1272,7 +1272,7 @@ vec4_visitor::setup_uniforms(int reg) for (unsigned int i = 0; i < 4; i++) { unsigned int slot = this->uniforms * 4 + i; static float zero = 0.0; - prog_data->base.param[slot] = &zero; + prog_data->param[slot] = &zero; } this->uniforms++; @@ -1281,9 +1281,9 @@ vec4_visitor::setup_uniforms(int reg) reg += ALIGN(uniforms, 2) / 2; } - prog_data->base.nr_params = this->uniforms * 4; + prog_data->nr_params = this->uniforms * 4; - prog_data->base.curb_read_length = reg - 1; + prog_data->curb_read_length = reg - 1; return reg; } @@ -1417,7 +1417,7 @@ vec4_visitor::run() } base_ir = NULL; - if (c->key.base.userclip_active && !c->key.base.uses_clip_distance) + if (key->userclip_active && !key->uses_clip_distance) setup_uniform_clipplane_values(); emit_thread_end(); diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index 144d29f9d7f..685154271e6 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -210,8 +210,10 @@ class vec4_visitor : public backend_visitor { public: vec4_visitor(struct brw_context *brw, - struct brw_vs_compile *c, - struct brw_vs_prog_data *prog_data, + struct brw_vec4_compile *c, + struct gl_program *prog, + const struct brw_vec4_prog_key *key, + struct brw_vec4_prog_data *prog_data, struct gl_shader_program *shader_prog, struct brw_shader *shader, void *mem_ctx); @@ -228,8 +230,9 @@ public: } struct gl_program *prog; - struct brw_vs_compile *c; - struct brw_vs_prog_data *prog_data; + struct brw_vec4_compile *c; + const struct brw_vec4_prog_key *key; + struct brw_vec4_prog_data *prog_data; unsigned int sanity_param_count; char *fail_msg; @@ -251,9 +254,6 @@ public: int *virtual_grf_use; dst_reg userplane[MAX_CLIP_PLANES]; - src_reg *vp_temp_regs; - src_reg vp_addr_reg; - /** * This is the size to be used for an array with an element per * reg_offset @@ -490,8 +490,8 @@ class vec4_vs_visitor : public vec4_visitor { public: vec4_vs_visitor(struct brw_context *brw, - struct brw_vs_compile *c, - struct brw_vs_prog_data *prog_data, + struct brw_vs_compile *vs_compile, + struct brw_vs_prog_data *vs_prog_data, struct gl_shader_program *prog, struct brw_shader *shader, void *mem_ctx); @@ -507,6 +507,11 @@ private: void setup_vp_regs(); dst_reg get_vp_dst_reg(const prog_dst_register &dst); src_reg get_vp_src_reg(const prog_src_register &src); + + struct brw_vs_compile * const vs_compile; + struct brw_vs_prog_data * const vs_prog_data; + src_reg *vp_temp_regs; + src_reg vp_addr_reg; }; /** diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp index f9ebc3cba2b..ac3d401ac3f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp @@ -76,7 +76,7 @@ vec4_visitor::reg_allocate_trivial() next += this->virtual_grf_sizes[i]; } } - prog_data->base.total_grf = next; + prog_data->total_grf = next; foreach_iter(exec_list_iterator, iter, this->instructions) { vec4_instruction *inst = (vec4_instruction *)iter.get(); @@ -87,9 +87,9 @@ vec4_visitor::reg_allocate_trivial() assign(hw_reg_mapping, &inst->src[2]); } - if (prog_data->base.total_grf > max_grf) { + if (prog_data->total_grf > max_grf) { fail("Ran out of regs on trivial allocator (%d/%d)\n", - prog_data->base.total_grf, max_grf); + prog_data->total_grf, max_grf); return false; } @@ -221,12 +221,12 @@ vec4_visitor::reg_allocate() * regs in the register classes back down to real hardware reg * numbers. */ - prog_data->base.total_grf = first_assigned_grf; + prog_data->total_grf = first_assigned_grf; for (int i = 0; i < virtual_grf_count; i++) { int reg = ra_get_node_reg(g, i); hw_reg_mapping[i] = first_assigned_grf + brw->vs.ra_reg_to_grf[reg]; - prog_data->base.total_grf = MAX2(prog_data->base.total_grf, + prog_data->total_grf = MAX2(prog_data->total_grf, hw_reg_mapping[i] + virtual_grf_sizes[i]); } @@ -321,7 +321,7 @@ void vec4_visitor::spill_reg(int spill_reg_nr) { assert(virtual_grf_sizes[spill_reg_nr] == 1); - unsigned int spill_offset = c->base.last_scratch++; + unsigned int spill_offset = c->last_scratch++; /* Generate spill/unspill instructions for the objects being spilled. */ foreach_list(node, &this->instructions) { diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 41d41e17366..40e16156005 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -605,12 +605,12 @@ vec4_visitor::setup_uniform_values(ir_variable *ir) int i; for (i = 0; i < uniform_vector_size[uniforms]; i++) { - prog_data->base.param[uniforms * 4 + i] = &components->f; + prog_data->param[uniforms * 4 + i] = &components->f; components++; } for (; i < 4; i++) { static float zero = 0; - prog_data->base.param[uniforms * 4 + i] = &zero; + prog_data->param[uniforms * 4 + i] = &zero; } uniforms++; @@ -632,14 +632,14 @@ vec4_visitor::setup_uniform_clipplane_values() */ int compacted_clipplane_index = 0; for (int i = 0; i < MAX_CLIP_PLANES; ++i) { - if (!(c->key.base.userclip_planes_enabled_gen_4_5 & (1 << i))) + if (!(key->userclip_planes_enabled_gen_4_5 & (1 << i))) continue; this->uniform_vector_size[this->uniforms] = 4; this->userplane[compacted_clipplane_index] = dst_reg(UNIFORM, this->uniforms); this->userplane[compacted_clipplane_index].type = BRW_REGISTER_TYPE_F; for (int j = 0; j < 4; ++j) { - prog_data->base.param[this->uniforms * 4 + j] = &clip_planes[i][j]; + prog_data->param[this->uniforms * 4 + j] = &clip_planes[i][j]; } ++compacted_clipplane_index; ++this->uniforms; @@ -648,12 +648,12 @@ vec4_visitor::setup_uniform_clipplane_values() /* In Gen6 and later, we don't compact clip planes, because this * simplifies the implementation of gl_ClipDistance. */ - for (int i = 0; i < c->key.base.nr_userclip_plane_consts; ++i) { + for (int i = 0; i < key->nr_userclip_plane_consts; ++i) { this->uniform_vector_size[this->uniforms] = 4; this->userplane[i] = dst_reg(UNIFORM, this->uniforms); this->userplane[i].type = BRW_REGISTER_TYPE_F; for (int j = 0; j < 4; ++j) { - prog_data->base.param[this->uniforms * 4 + j] = &clip_planes[i][j]; + prog_data->param[this->uniforms * 4 + j] = &clip_planes[i][j]; } ++this->uniforms; } @@ -689,7 +689,7 @@ vec4_visitor::setup_builtin_uniform_values(ir_variable *ir) int swiz = GET_SWZ(slots[i].swizzle, j); last_swiz = swiz; - prog_data->base.param[this->uniforms * 4 + j] = &values[swiz]; + prog_data->param[this->uniforms * 4 + j] = &values[swiz]; if (swiz <= last_swiz) this->uniform_vector_size[this->uniforms]++; } @@ -909,8 +909,8 @@ vec4_vs_visitor::emit_prolog() dst_reg es3_normalize_factor; for (int i = 0; i < VERT_ATTRIB_MAX; i++) { - if (prog_data->inputs_read & BITFIELD64_BIT(i)) { - uint8_t wa_flags = c->key.gl_attrib_wa_flags[i]; + if (vs_prog_data->inputs_read & BITFIELD64_BIT(i)) { + uint8_t wa_flags = vs_compile->key.gl_attrib_wa_flags[i]; dst_reg reg(ATTR, i); dst_reg reg_d = reg; reg_d.type = BRW_REGISTER_TYPE_D; @@ -1024,7 +1024,7 @@ vec4_vs_visitor::make_reg_for_system_value(ir_variable *ir) * it VERT_ATTRIB_MAX, which setup_attributes() picks up on. */ dst_reg *reg = new(mem_ctx) dst_reg(ATTR, VERT_ATTRIB_MAX); - prog_data->uses_vertexid = true; + vs_prog_data->uses_vertexid = true; switch (ir->location) { case SYSTEM_VALUE_VERTEX_ID: @@ -2304,7 +2304,7 @@ vec4_visitor::visit(ir_texture *ir) void vec4_visitor::swizzle_result(ir_texture *ir, src_reg orig_val, int sampler) { - int s = c->key.base.tex.swizzles[sampler]; + int s = key->tex.swizzles[sampler]; this->result = src_reg(this, ir->type); dst_reg swizzled_result(this->result); @@ -2418,8 +2418,8 @@ void vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) { if (intel->gen < 6 && - ((prog_data->base.vue_map.slots_valid & VARYING_BIT_PSIZ) || - c->key.base.userclip_active || brw->has_negative_rhw_bug)) { + ((prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) || + key->userclip_active || brw->has_negative_rhw_bug)) { dst_reg header1 = dst_reg(this, glsl_type::uvec4_type); dst_reg header1_w = header1; header1_w.writemask = WRITEMASK_W; @@ -2427,7 +2427,7 @@ vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) emit(MOV(header1, 0u)); - if (prog_data->base.vue_map.slots_valid & VARYING_BIT_PSIZ) { + if (prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) { src_reg psiz = src_reg(output_reg[VARYING_SLOT_PSIZ]); current_annotation = "Point size"; @@ -2436,7 +2436,7 @@ vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) } current_annotation = "Clipping flags"; - for (i = 0; i < c->key.base.nr_userclip_plane_consts; i++) { + for (i = 0; i < key->nr_userclip_plane_consts; i++) { vec4_instruction *inst; inst = emit(DP4(dst_null_f(), src_reg(output_reg[VARYING_SLOT_POS]), @@ -2472,7 +2472,7 @@ vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) emit(MOV(retype(reg, BRW_REGISTER_TYPE_UD), 0u)); } else { emit(MOV(retype(reg, BRW_REGISTER_TYPE_D), src_reg(0))); - if (prog_data->base.vue_map.slots_valid & VARYING_BIT_PSIZ) { + if (prog_data->vue_map.slots_valid & VARYING_BIT_PSIZ) { emit(MOV(brw_writemask(reg, WRITEMASK_W), src_reg(output_reg[VARYING_SLOT_PSIZ]))); } @@ -2503,11 +2503,11 @@ vec4_visitor::emit_clip_distances(struct brw_reg reg, int offset) * if the user wrote to it; otherwise we use gl_Position. */ gl_varying_slot clip_vertex = VARYING_SLOT_CLIP_VERTEX; - if (!(prog_data->base.vue_map.slots_valid & VARYING_BIT_CLIP_VERTEX)) { + if (!(prog_data->vue_map.slots_valid & VARYING_BIT_CLIP_VERTEX)) { clip_vertex = VARYING_SLOT_POS; } - for (int i = 0; i + offset < c->key.base.nr_userclip_plane_consts && i < 4; + for (int i = 0; i + offset < key->nr_userclip_plane_consts && i < 4; ++i) { emit(DP4(dst_reg(brw_writemask(reg, 1 << i)), src_reg(output_reg[clip_vertex]), @@ -2528,7 +2528,7 @@ vec4_visitor::emit_generic_urb_slot(dst_reg reg, int varying) varying == VARYING_SLOT_COL1 || varying == VARYING_SLOT_BFC0 || varying == VARYING_SLOT_BFC1) && - c->key.base.clamp_vertex_color) { + key->clamp_vertex_color) { inst->saturate = true; } } @@ -2557,7 +2557,7 @@ vec4_visitor::emit_urb_slot(int mrf, int varying) break; case VARYING_SLOT_CLIP_DIST0: case VARYING_SLOT_CLIP_DIST1: - if (this->c->key.base.uses_clip_distance) { + if (this->key->uses_clip_distance) { emit_generic_urb_slot(reg, varying); } else { current_annotation = "user clip distances"; @@ -2642,8 +2642,8 @@ vec4_vs_visitor::emit_thread_end() /* Set up the VUE data for the first URB write */ int slot; - for (slot = 0; slot < prog_data->base.vue_map.num_slots; ++slot) { - emit_urb_slot(mrf++, prog_data->base.vue_map.slot_to_varying[slot]); + for (slot = 0; slot < prog_data->vue_map.num_slots; ++slot) { + emit_urb_slot(mrf++, prog_data->vue_map.slot_to_varying[slot]); /* If this was max_usable_mrf, we can't fit anything more into this URB * WRITE. @@ -2654,7 +2654,7 @@ vec4_vs_visitor::emit_thread_end() } } - bool eot = slot >= prog_data->base.vue_map.num_slots; + bool eot = slot >= prog_data->vue_map.num_slots; if (eot) { if (INTEL_DEBUG & DEBUG_SHADER_TIME) emit_shader_time_end(); @@ -2669,10 +2669,10 @@ vec4_vs_visitor::emit_thread_end() if (!inst->eot) { mrf = base_mrf + 1; - for (; slot < prog_data->base.vue_map.num_slots; ++slot) { + for (; slot < prog_data->vue_map.num_slots; ++slot) { assert(mrf < max_usable_mrf); - emit_urb_slot(mrf++, prog_data->base.vue_map.slot_to_varying[slot]); + emit_urb_slot(mrf++, prog_data->vue_map.slot_to_varying[slot]); } if (INTEL_DEBUG & DEBUG_SHADER_TIME) @@ -2829,8 +2829,8 @@ vec4_visitor::move_grf_array_access_to_scratch() if (inst->dst.file == GRF && inst->dst.reladdr && scratch_loc[inst->dst.reg] == -1) { - scratch_loc[inst->dst.reg] = c->base.last_scratch; - c->base.last_scratch += this->virtual_grf_sizes[inst->dst.reg]; + scratch_loc[inst->dst.reg] = c->last_scratch; + c->last_scratch += this->virtual_grf_sizes[inst->dst.reg]; } for (int i = 0 ; i < 3; i++) { @@ -2838,8 +2838,8 @@ vec4_visitor::move_grf_array_access_to_scratch() if (src->file == GRF && src->reladdr && scratch_loc[src->reg] == -1) { - scratch_loc[src->reg] = c->base.last_scratch; - c->base.last_scratch += this->virtual_grf_sizes[src->reg]; + scratch_loc[src->reg] = c->last_scratch; + c->last_scratch += this->virtual_grf_sizes[src->reg]; } } } @@ -2948,12 +2948,12 @@ vec4_visitor::move_uniform_array_access_to_pull_constants() * add it. */ if (pull_constant_loc[uniform] == -1) { - const float **values = &prog_data->base.param[uniform * 4]; + const float **values = &prog_data->param[uniform * 4]; - pull_constant_loc[uniform] = prog_data->base.nr_pull_params / 4; + pull_constant_loc[uniform] = prog_data->nr_pull_params / 4; for (int j = 0; j < uniform_size[uniform] * 4; j++) { - prog_data->base.pull_param[prog_data->base.nr_pull_params++] + prog_data->pull_param[prog_data->nr_pull_params++] = values[j]; } } @@ -2995,13 +2995,14 @@ vec4_visitor::resolve_ud_negate(src_reg *reg) } vec4_visitor::vec4_visitor(struct brw_context *brw, - struct brw_vs_compile *c, - struct brw_vs_prog_data *prog_data, + struct brw_vec4_compile *c, + struct gl_program *prog, + const struct brw_vec4_prog_key *key, + struct brw_vec4_prog_data *prog_data, struct gl_shader_program *shader_prog, struct brw_shader *shader, void *mem_ctx) { - this->c = c; this->brw = brw; this->intel = &brw->intel; this->ctx = &intel->ctx; @@ -3016,7 +3017,8 @@ vec4_visitor::vec4_visitor(struct brw_context *brw, memset(this->output_reg_annotation, 0, sizeof(this->output_reg_annotation)); this->c = c; - this->prog = &c->vp->program.Base; + this->prog = prog; + this->key = key; this->prog_data = prog_data; this->variable_ht = hash_table_ctor(0, @@ -3044,12 +3046,16 @@ vec4_visitor::~vec4_visitor() vec4_vs_visitor::vec4_vs_visitor(struct brw_context *brw, - struct brw_vs_compile *c, - struct brw_vs_prog_data *prog_data, + struct brw_vs_compile *vs_compile, + struct brw_vs_prog_data *vs_prog_data, struct gl_shader_program *prog, struct brw_shader *shader, void *mem_ctx) - : vec4_visitor(brw, c, prog_data, prog, shader, mem_ctx) + : vec4_visitor(brw, &vs_compile->base, &vs_compile->vp->program.Base, + &vs_compile->key.base, &vs_prog_data->base, prog, shader, + mem_ctx), + vs_compile(vs_compile), + vs_prog_data(vs_prog_data) { } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp index 3f1d3a7b34f..95b39702444 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp @@ -410,12 +410,14 @@ vec4_vs_visitor::emit_program_code() * pull constants. Do that now. */ if (this->need_all_constants_in_pull_buffer) { - const struct gl_program_parameter_list *params = c->vp->program.Base.Parameters; + const struct gl_program_parameter_list *params = + vs_compile->vp->program.Base.Parameters; unsigned i; for (i = 0; i < params->NumParameters * 4; i++) { - prog_data->base.pull_param[i] = ¶ms->ParameterValues[i / 4][i % 4].f; + prog_data->pull_param[i] = + ¶ms->ParameterValues[i / 4][i % 4].f; } - prog_data->base.nr_pull_params = i; + prog_data->nr_pull_params = i; } } @@ -429,7 +431,8 @@ vec4_vs_visitor::setup_vp_regs() vp_temp_regs[i] = src_reg(this, glsl_type::vec4_type); /* PROGRAM_STATE_VAR etc. */ - struct gl_program_parameter_list *plist = c->vp->program.Base.Parameters; + struct gl_program_parameter_list *plist = + vs_compile->vp->program.Base.Parameters; for (unsigned p = 0; p < plist->NumParameters; p++) { unsigned components = plist->Parameters[p].Size; @@ -442,15 +445,15 @@ vec4_vs_visitor::setup_vp_regs() this->uniform_size[this->uniforms] = 1; /* 1 vec4 */ this->uniform_vector_size[this->uniforms] = components; for (unsigned i = 0; i < 4; i++) { - prog_data->base.param[this->uniforms * 4 + i] = i >= components + prog_data->param[this->uniforms * 4 + i] = i >= components ? 0 : &plist->ParameterValues[p][i].f; } this->uniforms++; /* counted in vec4 units */ } /* PROGRAM_OUTPUT */ - for (int slot = 0; slot < prog_data->base.vue_map.num_slots; slot++) { - int varying = prog_data->base.vue_map.slot_to_varying[slot]; + for (int slot = 0; slot < prog_data->vue_map.num_slots; slot++) { + int varying = prog_data->vue_map.slot_to_varying[slot]; if (varying == VARYING_SLOT_PSIZ) output_reg[varying] = dst_reg(this, glsl_type::float_type); else @@ -500,7 +503,8 @@ vec4_vs_visitor::get_vp_dst_reg(const prog_dst_register &dst) src_reg vec4_vs_visitor::get_vp_src_reg(const prog_src_register &src) { - struct gl_program_parameter_list *plist = c->vp->program.Base.Parameters; + struct gl_program_parameter_list *plist = + vs_compile->vp->program.Base.Parameters; src_reg result; diff --git a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp index 7c507f86d02..e2cdeeab2c5 100644 --- a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp +++ b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp @@ -38,7 +38,7 @@ public: struct intel_context *intel; struct gl_context *ctx; struct gl_shader_program *shader_prog; - struct brw_vs_compile *c; + struct brw_vertex_program *vp; vec4_visitor *v; }; @@ -47,9 +47,8 @@ class register_coalesce_vec4_visitor : public vec4_visitor { public: register_coalesce_vec4_visitor(struct brw_context *brw, - struct brw_vs_compile *c, struct gl_shader_program *shader_prog) - : vec4_visitor(brw, c, NULL, shader_prog, NULL, NULL) + : vec4_visitor(brw, NULL, NULL, NULL, NULL, shader_prog, NULL, NULL) { } @@ -89,14 +88,13 @@ void register_coalesce_test::SetUp() intel = &brw->intel; ctx = &intel->ctx; - c = ralloc(NULL, struct brw_vs_compile); - c->vp = ralloc(NULL, struct brw_vertex_program); + vp = ralloc(NULL, struct brw_vertex_program); shader_prog = ralloc(NULL, struct gl_shader_program); - v = new register_coalesce_vec4_visitor(brw, c, shader_prog); + v = new register_coalesce_vec4_visitor(brw, shader_prog); - _mesa_init_vertex_program(ctx, &c->vp->program, GL_VERTEX_SHADER, 0); + _mesa_init_vertex_program(ctx, &vp->program, GL_VERTEX_SHADER, 0); intel->gen = 4; } -- 2.30.2