From 5750c7c07e8f66618f1cb0879dc3058d9eb98924 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 9 Nov 2012 20:19:22 +0100 Subject: [PATCH] pytholite/compiler: improve naming of selection signals --- migen/pytholite/compiler.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/migen/pytholite/compiler.py b/migen/pytholite/compiler.py index 11669946..14fb248b 100644 --- a/migen/pytholite/compiler.py +++ b/migen/pytholite/compiler.py @@ -29,7 +29,8 @@ class _LowerAbstractLoad(fhdl.NodeTransformer): class _Register: def __init__(self, name, nbits): - self.storage = Signal(BV(nbits), name=name) + self.name = name + self.storage = Signal(BV(nbits), name=self.name) self.source_encoding = {} self.finalized = False @@ -41,7 +42,7 @@ class _Register: def finalize(self): if self.finalized: raise FinalizeError - self.sel = Signal(BV(bits_for(len(self.source_encoding) + 1)), name="pl_regsel") + self.sel = Signal(BV(bits_for(len(self.source_encoding) + 1)), name="pl_regsel_"+self.name) self.finalized = True def get_fragment(self): -- 2.30.2