From 578ef9dd936774ab4ad7faf262fae73aa0681bc0 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 9 Jan 2021 23:16:25 +0000 Subject: [PATCH] --- openpower/sv/ldst.mdwn | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn index b6a8ecabb..240962b5a 100644 --- a/openpower/sv/ldst.mdwn +++ b/openpower/sv/ldst.mdwn @@ -116,14 +116,14 @@ strided fail-first (by creating contiguous sequential LDs) does not. In addition, reduce mode makes no sense, and for LD/ST with immediates Vector source RA makes no sense either. Realistically we need -an alternative table meaning for [[sv/svp64]] mode. +an alternative table meaning for [[sv/svp64]] mode. The following modes make sense: * saturation -* predicate-result +* predicate-result (mostly for cache-inhibited LD/ST) * normal * fail-first, where vector source on RA or RB is banned -The table for [[sv/svp64] for immed(RA) is: +The table for [[sv/svp64]] for immed(RA) is: | 0-1 | 2 | 3 4 | description | | --- | --- |---------|-------------------------- | -- 2.30.2