From 57b0d14b8e0b511cf065c0a0f289d7a87fbe2114 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 9 Mar 2019 22:28:46 +0000 Subject: [PATCH] rename input to i (input is a python keyword) --- TLB/src/Cam.py | 2 +- TLB/src/VectorAssembler.py | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/TLB/src/Cam.py b/TLB/src/Cam.py index 937811fb..fcdecc26 100644 --- a/TLB/src/Cam.py +++ b/TLB/src/Cam.py @@ -92,7 +92,7 @@ class Cam(): # Send data input to all entries m.d.comb += entry_array[index].data_in.eq(self.data_in) #Send all entry matches to encoder - m.d.comb += self.vector_assembler.input[index].eq(entry_array[index].match) + m.d.comb += self.vector_assembler.i[index].eq(entry_array[index].match) # Give input to and accept output from encoder module m.d.comb += [ diff --git a/TLB/src/VectorAssembler.py b/TLB/src/VectorAssembler.py index 1bc71bcf..9054e971 100644 --- a/TLB/src/VectorAssembler.py +++ b/TLB/src/VectorAssembler.py @@ -19,7 +19,7 @@ class VectorAssembler(): self.width = width # Input - self.input = Array(Signal(1) for index in range(width)) + self.i = Array(Signal(1) for index in range(width)) # Output self.o = Signal(width) @@ -27,6 +27,6 @@ class VectorAssembler(): def elaborate(self, platform=None): m = Module() for index in range(self.width): - m.d.comb += self.o[index].eq(self.input[index]) + m.d.comb += self.o[index].eq(self.i[index]) return m -- 2.30.2