From 57c05a1d75f9cf6ab629aa4ed2f772106d30840b Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 25 Sep 2022 02:34:51 +0100 Subject: [PATCH] --- openpower/sv/overview/discussion.mdwn | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/openpower/sv/overview/discussion.mdwn b/openpower/sv/overview/discussion.mdwn index 1f210c5b2..f054ce722 100644 --- a/openpower/sv/overview/discussion.mdwn +++ b/openpower/sv/overview/discussion.mdwn @@ -305,7 +305,9 @@ just like any Memory, and therefore writing to half-word element `e4` starting from **GPR(2)** actually wrote to half-word element `e0` of GPR(3): - +Establishing the MSB0-ordering Bytes B0-B7 thru Half and Words H0-H3 +and W0-W1 with the LE-ordered c union for one single register, r0, +is as follows: | B0 | B1 | B2 | B3 | B4 | B5 | B6 | B7 | | H0 | H1 | H2 | H3 | @@ -314,4 +316,7 @@ half-word element `e0` of GPR(3): | r0.b[7] r0.b[5] r0.b[4] r0.b[3] r0.b[2] r0.b[1] r0.b[6] r0.b[0] | | r0.s[3] r0.s[2] r0.s[1] r0.s[0] | | r0.i[1] r0.i[1] | - | r0.l[0] | + | r0.l[0] | + +It is however just as critical to note that the following are also identical: + -- 2.30.2