From 57e36c4c066b5ee4b864c6569dd7c71c6958f320 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 28 May 2022 09:39:34 +0100 Subject: [PATCH] --- openpower/sv/int_fp_mv.mdwn | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index 955955a6b..ad1740f0f 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -400,16 +400,16 @@ are all set as normal for any GPR instructions that overflow. * `fcvttgw RT, FRA, Mode` Convert from 64-bit float to 32-bit signed integer, writing the result - to the GPR `RT`. Converts using [mode `Mode`] + to the GPR `RT`. Converts using [mode `Mode`]. Similar to `fctiw` or `fctiwz` * `fcvttguw RT, FRA, Mode` Convert from 64-bit float to 32-bit unsigned integer, writing the result - to the GPR `RT`. Converts using [mode `Mode`] + to the GPR `RT`. Converts using [mode `Mode`]. Similar to `fctiwu` or `fctiwuz` * `fcvttgd RT, FRA, Mode` Convert from 64-bit float to 64-bit signed integer, writing the result - to the GPR `RT`. Converts using [mode `Mode`] + to the GPR `RT`. Converts using [mode `Mode`]. Similar to `fctid` or `fctidz` * `fcvttgud RT, FRA, Mode` Convert from 64-bit float to 64-bit unsigned integer, writing the result - to the GPR `RT`. Converts using [mode `Mode`] + to the GPR `RT`. Converts using [mode `Mode`]. Similar to `fctidu` or `fctiduz` * `fcvtstgw RT, FRA, Mode` Convert from 32-bit float to 32-bit signed integer, writing the result to the GPR `RT`. Converts using [mode `Mode`] -- 2.30.2