From 57e6b981a37579907ae8a63aef3a78fa76cadfb8 Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Tue, 26 Sep 2017 18:50:23 +0000 Subject: [PATCH] vsx.md (vsx_xscvdpspn): Eliminate useless alternative constraint. 2017-09-26 Michael Meissner * config/rs6000/vsx.md (vsx_xscvdpspn): Eliminate useless alternative constraint. (vsx_xscvspdpn): Likewise. (vsx_xscvspdpn_scalar): Likewise. From-SVN: r253213 --- gcc/ChangeLog | 5 +++++ gcc/config/rs6000/vsx.md | 14 +++++++------- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 75ca6dbdf27..54acc7810f7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -16,6 +16,11 @@ instruction instead of FRSP and XSCVDPSPN. * config/rs6000/vsx.md (vsx_xscvspdp_scalar2): Move insn so that it is adjacent to the other XSCVSPDP insns. + (vsx_xscvdpsp_scalar): Use "ww" constraint instead of "f" to allow + SFmode to be in traditional Altivec registers. + (vsx_xscvdpspn): Eliminate useless alternative constraint. + (vsx_xscvspdpn): Likewise. + (vsx_xscvspdpn_scalar): Likewise. 2017-09-26 Martin Jambor diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 3c54d4a01ca..e21801abb46 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1803,7 +1803,7 @@ ;; format of scalars is actually DF. (define_insn "vsx_xscvdpsp_scalar" [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa") - (unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "f")] + (unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "ww")] UNSPEC_VSX_CVSPDP))] "VECTOR_UNIT_VSX_P (V4SFmode)" "xscvdpsp %x0,%x1" @@ -1811,24 +1811,24 @@ ;; ISA 2.07 xscvdpspn/xscvspdpn that does not raise an error on signalling NaNs (define_insn "vsx_xscvdpspn" - [(set (match_operand:V4SF 0 "vsx_register_operand" "=ww,?ww") - (unspec:V4SF [(match_operand:DF 1 "vsx_register_operand" "wd,wa")] + [(set (match_operand:V4SF 0 "vsx_register_operand" "=ww") + (unspec:V4SF [(match_operand:DF 1 "vsx_register_operand" "ws")] UNSPEC_VSX_CVDPSPN))] "TARGET_XSCVDPSPN" "xscvdpspn %x0,%x1" [(set_attr "type" "fp")]) (define_insn "vsx_xscvspdpn" - [(set (match_operand:DF 0 "vsx_register_operand" "=ws,?ws") - (unspec:DF [(match_operand:V4SF 1 "vsx_register_operand" "wf,wa")] + [(set (match_operand:DF 0 "vsx_register_operand" "=ws") + (unspec:DF [(match_operand:V4SF 1 "vsx_register_operand" "wa")] UNSPEC_VSX_CVSPDPN))] "TARGET_XSCVSPDPN" "xscvspdpn %x0,%x1" [(set_attr "type" "fp")]) (define_insn "vsx_xscvdpspn_scalar" - [(set (match_operand:V4SF 0 "vsx_register_operand" "=wf,?wa") - (unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "ww,ww")] + [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa") + (unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "ww")] UNSPEC_VSX_CVDPSPN))] "TARGET_XSCVDPSPN" "xscvdpspn %x0,%x1" -- 2.30.2