From 57f7c85dcf8ca8b47b71076fb70d9242aec00588 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 25 Nov 2015 23:35:29 -0800 Subject: [PATCH] i965: Implement gl_PatchVerticesIn by baking it into brw_tcs_prog_key. The hardware provides us no decent way of getting at the number of input vertices in the patch topology from the tessellation control shader. It's actually very surprising - normally this sort of information would be available in the thread payload. For the precompile, we guess that the number of vertices will be the same for both the input and output patches. This usually seems to be the case. On Gen8+, we could pass in an extra push constant containing this value. We may be able to do that on Haswell too. It's quite a bit trickier on Ivybridge, however. Signed-off-by: Kenneth Graunke Reviewed-by: Jordan Justen --- src/mesa/drivers/dri/i965/brw_compiler.h | 2 ++ src/mesa/drivers/dri/i965/brw_tcs.c | 8 ++++++++ src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp | 3 ++- 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h index e6bae8e902f..59084e62035 100644 --- a/src/mesa/drivers/dri/i965/brw_compiler.h +++ b/src/mesa/drivers/dri/i965/brw_compiler.h @@ -198,6 +198,8 @@ struct brw_tcs_prog_key GLenum tes_primitive_mode; + unsigned input_vertices; + struct brw_sampler_prog_key_data tex; }; diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c index b33a16d1710..b5eb4cdde5e 100644 --- a/src/mesa/drivers/dri/i965/brw_tcs.c +++ b/src/mesa/drivers/dri/i965/brw_tcs.c @@ -65,6 +65,8 @@ brw_tcs_debug_recompile(struct brw_context *brw, return; } + found |= key_debug(brw, "input vertices", old_key->input_vertices, + key->input_vertices); found |= key_debug(brw, "TES primitive mode", old_key->tes_primitive_mode, key->tes_primitive_mode); found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex); @@ -188,6 +190,7 @@ brw_upload_tcs_prog(struct brw_context *brw) if (!brw_state_dirty(brw, _NEW_TEXTURE, + BRW_NEW_PATCH_PRIMITIVE | BRW_NEW_TESS_CTRL_PROGRAM | BRW_NEW_TESS_EVAL_PROGRAM)) return; @@ -207,6 +210,8 @@ brw_upload_tcs_prog(struct brw_context *brw) key.program_string_id = tcp->id; + key.input_vertices = ctx->TessCtrlProgram.patch_vertices; + /* _NEW_TEXTURE */ brw_populate_sampler_prog_key_data(ctx, prog, stage_state->sampler_count, &key.tex); @@ -251,6 +256,9 @@ brw_tcs_precompile(struct gl_context *ctx, key.program_string_id = btcp->id; brw_setup_tex_for_precompile(brw, &key.tex, prog); + /* Guess that the input and output patches have the same dimensionality. */ + key.input_vertices = shader_prog->TessCtrl.VerticesOut; + key.tes_primitive_mode = GL_TRIANGLES; success = brw_codegen_tcs_prog(brw, shader_prog, btcp, &key); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp index 22224d1186b..bd985598f65 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp @@ -257,7 +257,8 @@ vec4_tcs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) get_nir_dest(instr->dest, BRW_REGISTER_TYPE_UD)); break; case nir_intrinsic_load_patch_vertices_in: - unreachable("XXX: gl_PatchVerticesIn not implemented yet."); + emit(MOV(get_nir_dest(instr->dest, BRW_REGISTER_TYPE_D), + brw_imm_d(key->input_vertices))); break; case nir_intrinsic_load_per_vertex_input: { src_reg indirect_offset = get_indirect_offset(instr); -- 2.30.2