From 58715b72396133350c1549381553121f936a198e Mon Sep 17 00:00:00 2001 From: =?utf8?q?Tapani=20P=C3=A4lli?= Date: Tue, 12 May 2015 14:24:08 +0300 Subject: [PATCH] i965/fs: set execution size to 8 with simd8 ddy instruction MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Commit dd5c825 changed the way how execution size for instructions get set. Previously it was based on destination register width, now it is set explicitly when emitting instructions. Signed-off-by: Tapani Pälli Reviewed-by: Francisco Jerez Reviewed-by: Matt Turner Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90258 --- src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index a99b7f75b26..b6b0d0523a0 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -941,6 +941,7 @@ fs_generator::generate_ddy(enum opcode opcode, brw_push_insn_state(p); brw_set_default_access_mode(p, BRW_ALIGN_16); if (unroll_to_simd8) { + brw_set_default_exec_size(p, BRW_EXECUTE_8); brw_set_default_compression_control(p, BRW_COMPRESSION_NONE); if (negate_value) { brw_ADD(p, firsthalf(dst), firsthalf(src1), negate(firsthalf(src0))); -- 2.30.2