From 58d062b87d0f2cc66292c5b16ff2f34093aeaa89 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sat, 29 Jul 2017 21:07:23 +0200 Subject: [PATCH] radeonsi: de-atomize L2 prefetch MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit I'd like to be able to move the prefetch call site around. Tested-by: Dieter Nützel Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_cp_dma.c | 7 +++---- src/gallium/drivers/radeonsi/si_descriptors.c | 2 +- src/gallium/drivers/radeonsi/si_hw_context.c | 2 +- src/gallium/drivers/radeonsi/si_pipe.h | 3 ++- src/gallium/drivers/radeonsi/si_state.h | 1 - src/gallium/drivers/radeonsi/si_state_draw.c | 3 +++ src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +- 7 files changed, 11 insertions(+), 9 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c index e42f260edb0..9f0e506282b 100644 --- a/src/gallium/drivers/radeonsi/si_cp_dma.c +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c @@ -450,7 +450,7 @@ static void cik_prefetch_shader_async(struct si_context *sctx, } } -static void cik_emit_prefetch_L2(struct si_context *sctx, struct r600_atom *atom) +void cik_emit_prefetch_L2(struct si_context *sctx) { /* Prefetch shaders and VBO descriptors to TC L2. */ if (si_pm4_state_changed(sctx, ls)) @@ -473,12 +473,11 @@ static void cik_emit_prefetch_L2(struct si_context *sctx, struct r600_atom *atom } if (si_pm4_state_changed(sctx, ps)) cik_prefetch_shader_async(sctx, sctx->queued.named.ps); + + sctx->prefetch_L2 = false; } void si_init_cp_dma_functions(struct si_context *sctx) { sctx->b.clear_buffer = si_clear_buffer; - - si_init_atom(sctx, &sctx->prefetch_L2, &sctx->atoms.s.prefetch_L2, - cik_emit_prefetch_L2); } diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index ea5b89e3ad6..917b0e1a529 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -1177,7 +1177,7 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx) * cache is needed. */ si_mark_atom_dirty(sctx, &sctx->shader_userdata.atom); if (sctx->b.chip_class >= CIK) - si_mark_atom_dirty(sctx, &sctx->prefetch_L2); + sctx->prefetch_L2 = true; sctx->vertex_buffers_dirty = false; sctx->vertex_buffer_pointer_dirty = true; return true; diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c index f2dfcc7cc5e..756b15968d9 100644 --- a/src/gallium/drivers/radeonsi/si_hw_context.c +++ b/src/gallium/drivers/radeonsi/si_hw_context.c @@ -217,7 +217,7 @@ void si_begin_new_cs(struct si_context *ctx) si_ce_restore_all_descriptors_at_ib_start(ctx); if (ctx->b.chip_class >= CIK) - si_mark_atom_dirty(ctx, &ctx->prefetch_L2); + ctx->prefetch_L2 = true; /* CLEAR_STATE disables all colorbuffers, so only enable bound ones. */ ctx->framebuffer.dirty_cbufs = diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 19842999072..d21388649a1 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -283,6 +283,7 @@ struct si_context { bool gfx_flush_in_progress:1; bool compute_is_busy:1; + bool prefetch_L2:1; /* Atoms (direct states). */ union si_state_atoms atoms; @@ -293,7 +294,6 @@ struct si_context { union si_state emitted; /* Atom declarations. */ - struct r600_atom prefetch_L2; struct si_framebuffer framebuffer; struct si_sample_locs msaa_sample_locs; struct r600_atom db_render_state; @@ -484,6 +484,7 @@ void si_copy_buffer(struct si_context *sctx, unsigned user_flags); void cik_prefetch_TC_L2_async(struct si_context *sctx, struct pipe_resource *buf, uint64_t offset, unsigned size); +void cik_emit_prefetch_L2(struct si_context *sctx); void si_init_cp_dma_functions(struct si_context *sctx); /* si_debug.c */ diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index acc8fb7870a..9fbede702a7 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -141,7 +141,6 @@ union si_state { union si_state_atoms { struct { /* The order matters. */ - struct r600_atom *prefetch_L2; struct r600_atom *render_cond; struct r600_atom *streamout_begin; struct r600_atom *streamout_enable; /* must be after streamout_begin */ diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 52546451bc7..3f933fec2dc 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -1346,6 +1346,9 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) if (sctx->b.flags) si_emit_cache_flush(sctx); + if (sctx->prefetch_L2) + cik_emit_prefetch_L2(sctx); + /* Emit state atoms. */ mask = sctx->dirty_atoms; while (mask) { diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index daf4af5b28b..0dd64025d48 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -3308,7 +3308,7 @@ bool si_update_shaders(struct si_context *sctx) } if (sctx->b.chip_class >= CIK) - si_mark_atom_dirty(sctx, &sctx->prefetch_L2); + sctx->prefetch_L2 = true; sctx->do_update_shaders = false; return true; -- 2.30.2