From 59337f8ddc2eb4b8a366553c7339d8654e7c4eee Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 24 Mar 2020 10:26:10 +0000 Subject: [PATCH] add cross-references to bugreports and wiki --- src/soc/scoreboard/addr_split.py | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/soc/scoreboard/addr_split.py b/src/soc/scoreboard/addr_split.py index d2087003..32f17f36 100644 --- a/src/soc/scoreboard/addr_split.py +++ b/src/soc/scoreboard/addr_split.py @@ -1,4 +1,10 @@ # LDST Address Splitter. For misaligned address crossing cache line boundary +""" +Links: +* https://libre-riscv.org/3d_gpu/architecture/6600scoreboard/ +* http://bugs.libre-riscv.org/show_bug.cgi?id=257 +* http://bugs.libre-riscv.org/show_bug.cgi?id=216 +""" from nmigen import Elaboratable, Module, Signal, Record, Array, Const from nmutil.latch import SRLatch, latchregister -- 2.30.2