From 59440b6f19180cc65a71c6dcf0175dfac307e924 Mon Sep 17 00:00:00 2001 From: Andrey Miroshnikov Date: Thu, 9 Jun 2022 23:34:20 +0100 Subject: [PATCH] Updated my bugs/info --- about_us.mdwn | 4 ++-- andreym.mdwn | 15 ++++++++++----- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/about_us.mdwn b/about_us.mdwn index ca9c8689b..34a4b5e70 100644 --- a/about_us.mdwn +++ b/about_us.mdwn @@ -193,10 +193,10 @@ Alain's website: * Other interests: Nearly anything that floats, flies, or has an engine with wheels ## [[Andrey Miroshnikov|andreym]] -* Languages: C, Python, Verilog +* Languages: C, Python, Verilog, Shell script * Interests: Analogue/digital electronics, RF, mobile comms, compilers, FPGAs, discrete mathematics, microarchitecture, Unix OSs, PCB design * Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium) -* Other interests: Lingua Latina, Philosophy, History +* Other interests: King James Bible, Russian Synodal Bible, Languages, Philosophy, History * Availability: Full-time * IRC: octavius diff --git a/andreym.mdwn b/andreym.mdwn index d45eae689..a7be4db64 100644 --- a/andreym.mdwn +++ b/andreym.mdwn @@ -9,10 +9,7 @@ - (Pinout) - NGI POINTER Gigabit Router Pinout Considerations * Working on pinmux with Luke - nmigen pinmux -* Peripheral Pin Muxing Development - - Bug for the pinmux and GPIO block development -* Documentation of I/O Core/Pad JTAG Tests - - Documentation of the development and tests from bugs #763 and #762 +* Pinmux Pinspec Interconnect Auto-Generation ## On hold * Looking at Wishbone B4 and AXI specifications for streaming extension. @@ -21,7 +18,15 @@ ## Submitted to NLNet but not yet paid -* Nothing yet +### NLnet.2019.02 + +* [Bug #762](https://bugs.libre-soc.org/show_bug.cgi?id=762): + Peripheral Pin Muxing Development + * €1500 out of total of €1800 + +* [Bug #764](https://bugs.libre-soc.org/show_bug.cgi?id=764): + Documentation of I/O Core/Pad JTAG Tests + * €1500 which is the total amount ## Paid by NLNet -- 2.30.2