From 5994382a20a0b7e890d22d032eecb39b61e0b3ce Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddieh@ece.ubc.ca>
Date: Thu, 21 Feb 2019 11:16:57 -0800
Subject: [PATCH] tests/simple to also do LUT synth

---
 tests/tools/autotest.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh
index 65fd4cb1f..34007b689 100755
--- a/tests/tools/autotest.sh
+++ b/tests/tools/autotest.sh
@@ -180,6 +180,7 @@ do
 		else
 			test_passes -f "$frontend $include_opts" -p "hierarchy; proc; opt; memory; opt; fsm; opt -full -fine" ${bn}_ref.v
 			test_passes -f "$frontend $include_opts" -p "hierarchy; synth -run coarse; techmap; opt; abc -dff" ${bn}_ref.v
+			test_passes -f "$frontend $include_opts" -p "hierarchy; synth -run coarse; techmap; opt; abc -lut 4" ${bn}_ref.v
 			if [ -n "$firrtl2verilog" ]; then
 			    if test -z "$xfirrtl" || ! grep "$fn" "$xfirrtl" ; then
 				"$toolsdir"/../../yosys -b "firrtl" -o ${bn}_ref.fir -f "$frontend $include_opts" -p "prep -nordff; proc; opt; memory; opt; fsm; opt -full -fine; pmuxtree" ${bn}_ref.v
-- 
2.30.2