From 5997501ca0d0c905025bc2a840e48e2176d64ea3 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 24 Feb 2010 11:43:33 -0500 Subject: [PATCH] r600: proper fix for 15601835361e2fdd34b38b265cfc3007749ee24d PRE_EMIT_STATE_BUFSZ accounts for the start 3d, idle, cd/db flush not for state. The relocs for CB_COLOR0_FRAG & CB_COLOR0_TILE are part of the render target state. --- src/mesa/drivers/dri/r600/r700_chip.c | 2 +- src/mesa/drivers/dri/r600/r700_render.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c index a742dbcf129..63614b160cc 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.c +++ b/src/mesa/drivers/dri/r600/r700_chip.c @@ -1349,7 +1349,7 @@ void r600InitAtoms(context_t *context) ALLOC_STATE(poly, always, 10, r700SendPolyState); ALLOC_STATE(cb, cb, 18, r700SendCBState); ALLOC_STATE(clrcmp, always, 6, r700SendCBCLRCMPState); - ALLOC_STATE(cb_target, always, 25, r700SendRenderTargetState); + ALLOC_STATE(cb_target, always, 29, r700SendRenderTargetState); ALLOC_STATE(blnd, blnd, (6 + (R700_MAX_RENDER_TARGETS * 3)), r700SendCBBlendState); ALLOC_STATE(blnd_clr, always, 6, r700SendCBBlendColorState); ALLOC_STATE(sx, always, 9, r700SendSXState); diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c index fdd02fac237..1d7a94cbb28 100644 --- a/src/mesa/drivers/dri/r600/r700_render.c +++ b/src/mesa/drivers/dri/r600/r700_render.c @@ -419,7 +419,7 @@ static void r700RunRenderPrimitiveImmediate(GLcontext * ctx, int start, int end, } /* start 3d, idle, cb/db flush */ -#define PRE_EMIT_STATE_BUFSZ 5 + 5 + 18 +#define PRE_EMIT_STATE_BUFSZ 5 + 5 + 14 static GLuint r700PredictRenderSize(GLcontext* ctx, const struct _mesa_prim *prim, -- 2.30.2