From 59b098c97067d1eb3516e704e3941ca4b4701d1b Mon Sep 17 00:00:00 2001 From: M R Swami Reddy Date: Thu, 27 Nov 2008 11:30:33 +0000 Subject: [PATCH] * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and adjusted the mask for 32-bit branch instruction. --- opcodes/ChangeLog | 5 +++++ opcodes/cr16-dis.c | 6 +++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 479eed9e79a..cb072c73d5e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2008-11-27 M R Swami Reddy + + * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and + adjusted the mask for 32-bit branch instruction. + 2008-11-27 Alan Modra * ppc-opc.c (extract_sprg): Correct operand range check. diff --git a/opcodes/cr16-dis.c b/opcodes/cr16-dis.c index de3eb753bf0..2627141d0fa 100644 --- a/opcodes/cr16-dis.c +++ b/opcodes/cr16-dis.c @@ -322,7 +322,7 @@ match_opcode (void) { unsigned long mask; /* The instruction 'constant' opcode doewsn't exceed 32 bits. */ - unsigned long doubleWord = words[1] + (words[0] << 16); + unsigned long doubleWord = (words[1] + (words[0] << 16)) & 0xffffffff; /* Start searching from end of instruction table. */ instruction = &cr16_instruction[NUMOPCODES - 2]; @@ -331,6 +331,10 @@ match_opcode (void) while (instruction >= cr16_instruction) { mask = build_mask (); + /* Adjust mask for bcond with 32-bit size instruction */ + if ((IS_INSN_MNEMONIC("b") && instruction->size == 2)) + mask = 0xff0f0000; + if ((doubleWord & mask) == BIN (instruction->match, instruction->match_bits)) return 1; -- 2.30.2