From 59d92b1da638e4f6c63c893be01ff0c63bd014e1 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 29 Feb 2024 10:30:08 +0000 Subject: [PATCH] bug 1155: add svshape4 to minor22.csv --- openpower/isatables/minor_22.csv | 5 +++-- src/openpower/decoder/isa/ed25519/curve25519_mul.py | 5 +++-- src/openpower/decoder/isa/remapyield.py | 6 ++++-- src/openpower/decoder/isa/svshape.py | 2 +- src/openpower/decoder/power_enums.py | 1 + src/openpower/insndb/asm.py | 3 +++ 6 files changed, 15 insertions(+), 7 deletions(-) diff --git a/openpower/isatables/minor_22.csv b/openpower/isatables/minor_22.csv index d8a1c3d5..56c74f09 100644 --- a/openpower/isatables/minor_22.csv +++ b/openpower/isatables/minor_22.csv @@ -25,8 +25,9 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry ou 1111-011001,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape,SVM,,1,unofficial until submitted and approved/renumbered by the opf isa wg # svshape2: {-100,mm,011001} 100--011001,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape2,SVM2,,1,unofficial until submitted and approved/renumbered by the opf isa wg -# svshape3 - none of the horribleness of shoe-horning svshape2 in it ------000001,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape3,SVM,,1,unofficial until submitted and approved/renumbered by the opf isa wg +# svshape3 and svshape4, none of the horribleness of shoe-horning svshape2 in it +------10000,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape3,SVM,,1,unofficial until submitted and approved/renumbered by the opf isa wg +------11000,VL,OP_SVSHAPE,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,svshape4,SVI2,,1,unofficial until submitted and approved/renumbered by the opf isa wg # A/V bitmanip 1101001110-,ALU,OP_AVGADD,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,avgadd,X,,1,unofficial until submitted and approved/renumbered by the opf isa wg --01101110-,ALU,OP_SHADD,RA,RB,NONE,RT,NONE,CR0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC_ONLY,0,0,sadd,Z23,,1,unofficial until submitted and approved/renumbered by the opf isa wg diff --git a/src/openpower/decoder/isa/ed25519/curve25519_mul.py b/src/openpower/decoder/isa/ed25519/curve25519_mul.py index 5c93daad..dbc87bbb 100644 --- a/src/openpower/decoder/isa/ed25519/curve25519_mul.py +++ b/src/openpower/decoder/isa/ed25519/curve25519_mul.py @@ -34,8 +34,9 @@ r1 += c; """ import random -from ed25519util import (add128_64, lo128, shr128, - reduce_mask_51, MASK64, MASK128) +from openpower.decoder.isa.ed25519.ed25519util import (add128_64, + lo128, shr128, + reduce_mask_51, MASK64, MASK128) from copy import deepcopy diff --git a/src/openpower/decoder/isa/remapyield.py b/src/openpower/decoder/isa/remapyield.py index 42b04785..c4df6838 100644 --- a/src/openpower/decoder/isa/remapyield.py +++ b/src/openpower/decoder/isa/remapyield.py @@ -185,18 +185,20 @@ def demo(): dump_shape(SVSHAPE0) # triangle + xdim, ydim, zdim = 1, 5, 5 # set the dimension sizes here print("\ntriangle", xdim, ydim, zdim) - xdim, ydim, zdim = 1, 3, 5 # set the dimension sizes here SVSHAPE0 = SVSHAPE() SVSHAPE0.lims = [xdim, ydim, zdim] SVSHAPE0.order = [0,1,2] # experiment with different permutations, here SVSHAPE0.mode = 0b11 SVSHAPE0.submode = 0b10 # triangle mode SVSHAPE0.submode2 = 0b000 # - SVSHAPE0.skip = 0b00 + SVSHAPE0.skip = 0b11 SVSHAPE0.offset = 0 # experiment with different offset, here SVSHAPE0.invxyz = [0,0,0] # inversion if desired + dump_shape(SVSHAPE0) + # triangle print("\ntriangle-bigmul", xdim, ydim, zdim) xdim, ydim, zdim = 1, 3, 5 # set the dimension sizes here diff --git a/src/openpower/decoder/isa/svshape.py b/src/openpower/decoder/isa/svshape.py index ce833a14..81c08dbf 100644 --- a/src/openpower/decoder/isa/svshape.py +++ b/src/openpower/decoder/isa/svshape.py @@ -51,7 +51,7 @@ class SVSHAPE(SelectableInt): def is_triangle(self): "REMAP Triangle Mode" - return self.mode == 0b11 and self._skip in [0b00, 0b01] + return self.mode == 0b11 and self._skip in [0b10, 0b11] @property def submode2(self): diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py index 56272546..081af725 100644 --- a/src/openpower/decoder/power_enums.py +++ b/src/openpower/decoder/power_enums.py @@ -819,6 +819,7 @@ _insns = [ "svshape", # https://libre-soc.org/openpower/sv/remap/#svshape "svshape2", # https://libre-soc.org/openpower/sv/remap/#svshape2 TODO "svshape3", # https://libre-soc.org/openpower/sv/remap/#svshape3 TODO + "svshape4", # https://libre-soc.org/openpower/sv/remap/#svshape4 TODO "svstep", # https://libre-soc.org/openpower/sv/setvl "sim_cfg", "sadd", "saddw", "sadduw", diff --git a/src/openpower/insndb/asm.py b/src/openpower/insndb/asm.py index 0d7f8c06..5713ed43 100644 --- a/src/openpower/insndb/asm.py +++ b/src/openpower/insndb/asm.py @@ -310,6 +310,9 @@ if __name__ == '__main__': lst = [ #"sv.cmp/ff=gt *0,*1,*2,0", "dsld 5,4,5,3", + 'svshape2 8, 1, 31, 7, 1, 1', + 'svshape4 5,5,0,0,0,3,3,0', # SVSHAPE0, triangle mode + ] isa = SVP64Asm(lst, macros=macros) -- 2.30.2