From 5a360dcad1fdb91f9129cb21775b9af60cbf57e4 Mon Sep 17 00:00:00 2001 From: Matt Turner Date: Fri, 2 Oct 2015 20:30:41 -0700 Subject: [PATCH] i965: Generalize predicated break pass for use in vec4 backend. instructions in affected programs: 44204 -> 43762 (-1.00%) helped: 221 Reviewed-by: Jason Ekstrand --- src/mesa/drivers/dri/i965/Makefile.sources | 2 +- src/mesa/drivers/dri/i965/brw_fs.cpp | 2 +- ...cated_break.cpp => brw_predicated_break.cpp} | 17 ++++++++--------- src/mesa/drivers/dri/i965/brw_shader.h | 6 +++++- src/mesa/drivers/dri/i965/brw_vec4.cpp | 1 + 5 files changed, 16 insertions(+), 12 deletions(-) rename src/mesa/drivers/dri/i965/{brw_fs_peephole_predicated_break.cpp => brw_predicated_break.cpp} (90%) diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources index eb8196d4845..6f97f735add 100644 --- a/src/mesa/drivers/dri/i965/Makefile.sources +++ b/src/mesa/drivers/dri/i965/Makefile.sources @@ -55,7 +55,6 @@ i965_FILES = \ brw_fs_live_variables.cpp \ brw_fs_live_variables.h \ brw_fs_nir.cpp \ - brw_fs_peephole_predicated_break.cpp \ brw_fs_reg_allocate.cpp \ brw_fs_register_coalesce.cpp \ brw_fs_saturate_propagation.cpp \ @@ -91,6 +90,7 @@ i965_FILES = \ brw_packed_float.c \ brw_performance_monitor.c \ brw_pipe_control.c \ + brw_predicated_break.cpp \ brw_primitive_restart.c \ brw_program.c \ brw_program.h \ diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 03206882ebf..1187c6765cd 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -4823,7 +4823,7 @@ fs_visitor::optimize() OPT(opt_algebraic); OPT(opt_cse); OPT(opt_copy_propagate); - OPT(opt_peephole_predicated_break); + OPT(opt_predicated_break, this); OPT(opt_cmod_propagation); OPT(dead_code_eliminate); OPT(opt_peephole_sel); diff --git a/src/mesa/drivers/dri/i965/brw_fs_peephole_predicated_break.cpp b/src/mesa/drivers/dri/i965/brw_predicated_break.cpp similarity index 90% rename from src/mesa/drivers/dri/i965/brw_fs_peephole_predicated_break.cpp rename to src/mesa/drivers/dri/i965/brw_predicated_break.cpp index 29f21680655..607715dace4 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_peephole_predicated_break.cpp +++ b/src/mesa/drivers/dri/i965/brw_predicated_break.cpp @@ -21,12 +21,11 @@ * IN THE SOFTWARE. */ -#include "brw_fs.h" #include "brw_cfg.h" using namespace brw; -/** @file brw_fs_peephole_predicated_break.cpp +/** @file brw_predicated_break.cpp * * Loops are often structured as * @@ -55,11 +54,11 @@ using namespace brw; */ bool -fs_visitor::opt_peephole_predicated_break() +opt_predicated_break(backend_shader *s) { bool progress = false; - foreach_block (block, cfg) { + foreach_block (block, s->cfg) { if (block->start_ip != block->end_ip) continue; @@ -101,13 +100,13 @@ fs_visitor::opt_peephole_predicated_break() if (!earlier_block->ends_with_control_flow()) { earlier_block->children.make_empty(); - earlier_block->add_successor(cfg->mem_ctx, jump_block); + earlier_block->add_successor(s->cfg->mem_ctx, jump_block); } if (!later_block->starts_with_control_flow()) { later_block->parents.make_empty(); } - jump_block->add_successor(cfg->mem_ctx, later_block); + jump_block->add_successor(s->cfg->mem_ctx, later_block); if (earlier_block->can_combine_with(jump_block)) { earlier_block->combine_with(jump_block); @@ -130,20 +129,20 @@ fs_visitor::opt_peephole_predicated_break() while_inst->predicate_inverse = !jump_inst->predicate_inverse; earlier_block->children.make_empty(); - earlier_block->add_successor(cfg->mem_ctx, while_block); + earlier_block->add_successor(s->cfg->mem_ctx, while_block); assert(earlier_block->can_combine_with(while_block)); earlier_block->combine_with(while_block); earlier_block->next()->parents.make_empty(); - earlier_block->add_successor(cfg->mem_ctx, earlier_block->next()); + earlier_block->add_successor(s->cfg->mem_ctx, earlier_block->next()); } progress = true; } if (progress) - invalidate_live_intervals(); + s->invalidate_live_intervals(); return progress; } diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index fd96740526b..b6c070ef4c7 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -219,7 +219,7 @@ enum instruction_scheduler_mode { SCHEDULE_POST, }; -class backend_shader { +struct backend_shader { protected: backend_shader(const struct brw_compiler *compiler, @@ -273,6 +273,8 @@ void brw_setup_image_uniform_values(gl_shader_stage stage, unsigned param_start_index, const gl_uniform_storage *storage); +#else +struct backend_shader; #endif /* __cplusplus */ enum brw_reg_type brw_type_for_base_type(const struct glsl_type *type); @@ -283,6 +285,8 @@ bool brw_saturate_immediate(enum brw_reg_type type, struct brw_reg *reg); bool brw_negate_immediate(enum brw_reg_type type, struct brw_reg *reg); bool brw_abs_immediate(enum brw_reg_type type, struct brw_reg *reg); +bool opt_predicated_break(struct backend_shader *s); + #ifdef __cplusplus extern "C" { #endif diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 7e94cc3ef4a..76ce0c46198 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -1862,6 +1862,7 @@ vec4_visitor::run() pass_num = 0; iteration++; + OPT(opt_predicated_break, this); OPT(opt_reduce_swizzle); OPT(dead_code_eliminate); OPT(dead_control_flow_eliminate, this); -- 2.30.2