From 5a4d8af2f6e4bd23706995500596e748b04dc483 Mon Sep 17 00:00:00 2001 From: R Veera Kumar Date: Thu, 25 Nov 2021 05:09:34 +0530 Subject: [PATCH] Add expected state to case_rand_imm in alu_cases unit test --- src/openpower/test/alu/alu_cases.py | 36 ++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/src/openpower/test/alu/alu_cases.py b/src/openpower/test/alu/alu_cases.py index 81f88120..8dcbe2e5 100644 --- a/src/openpower/test/alu/alu_cases.py +++ b/src/openpower/test/alu/alu_cases.py @@ -252,7 +252,41 @@ class ALUTestCase(TestAccumulatorBase): print(lst) initial_regs = [0] * 32 initial_regs[1] = random.randint(0, (1 << 64)-1) - self.add_case(Program(lst, bigendian), initial_regs) + + e = ExpectedState(pc=4) + e.intregs[1] = initial_regs[1] + if choice == "addi": + result = initial_regs[1] + imm + if result < 0: + e.intregs[3] = (result + 2**64) & ((2**64)-1) + else: + e.intregs[3] = result & ((2**64)-1) + elif choice == "addis": + result = initial_regs[1] + (imm<<16) + if result < 0: + e.intregs[3] = (result + 2**64) & ((2**64)-1) + else: + e.intregs[3] = result & ((2**64)-1) + elif choice == "subfic": + result = ~initial_regs[1] + imm + 1 + if imm >= 0: + value = (~initial_regs[1]+2**64) + (imm) + 1 + else: + value = (~initial_regs[1]+2**64) + (imm+2**64) + 1 + carry_out = value & (1<<64) != 0 + if imm >= 0: + carry_out32 = (((~initial_regs[1]+2**64) & 0xffff_ffff) + \ + (imm) + 1) & (1<<32) + else: + carry_out32 = (((~initial_regs[1]+2**64) & 0xffff_ffff) + \ + (imm+2**32) + 1) & (1<<32) + if result < 0: + e.intregs[3] = (result + 2**64) & ((2**64)-1) + else: + e.intregs[3] = result & ((2**64)-1) + e.ca = carry_out | (carry_out32>>31) + + self.add_case(Program(lst, bigendian), initial_regs, expected=e) def case_0_adde(self): lst = ["adde. 5, 6, 7"] -- 2.30.2