From 5a6d9a81c7415f0efb61a18f5bd4890286a1c003 Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Wed, 18 Feb 2004 21:55:02 +0000 Subject: [PATCH] h8300.md (four define_peephole2's): Use h8300_regs_ok_for_stm(). * config/h8300/h8300.md (four define_peephole2's): Use h8300_regs_ok_for_stm(). From-SVN: r78048 --- gcc/ChangeLog | 5 +++++ gcc/config/h8300/h8300.md | 32 ++++++-------------------------- 2 files changed, 11 insertions(+), 26 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 82b99989b29..d89ce3c1462 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2004-02-18 Kazu Hirata + + * config/h8300/h8300.md (four define_peephole2's): Use + h8300_regs_ok_for_stm(). + 2004-02-18 Kazu Hirata * config/h8300/h8300-protos.h: Update the prototype for diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index bf37b8928ba..dd77e3279ec 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -3770,10 +3770,7 @@ (set (mem:SI (pre_dec:SI (reg:SI SP_REG))) (match_operand:SI 3 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE - && REGNO (operands[0]) == 0 - && REGNO (operands[1]) == 1 - && REGNO (operands[2]) == 2 - && REGNO (operands[3]) == 3" + && h8300_regs_ok_for_stm (4, operands)" [(parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -16))) @@ -3797,10 +3794,7 @@ (set (mem:SI (pre_dec:HI (reg:HI SP_REG))) (match_operand:SI 3 "register_operand" ""))] "TARGET_H8300S && TARGET_NORMAL_MODE - && REGNO (operands[0]) == 0 - && REGNO (operands[1]) == 1 - && REGNO (operands[2]) == 2 - && REGNO (operands[3]) == 3" + && h8300_regs_ok_for_stm (4, operands)" [(parallel [(set (reg:HI SP_REG) (plus:HI (reg:HI SP_REG) (const_int -16))) @@ -3824,12 +3818,7 @@ (set (mem:SI (pre_dec:SI (reg:SI SP_REG))) (match_operand:SI 2 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE - && ((REGNO (operands[0]) == 0 - && REGNO (operands[1]) == 1 - && REGNO (operands[2]) == 2) - || (REGNO (operands[0]) == 4 - && REGNO (operands[1]) == 5 - && REGNO (operands[2]) == 6))" + && h8300_regs_ok_for_stm (3, operands)" [(parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -12))) @@ -3849,12 +3838,7 @@ (set (mem:SI (pre_dec:HI (reg:HI SP_REG))) (match_operand:SI 2 "register_operand" ""))] "TARGET_H8300S && TARGET_NORMAL_MODE - && ((REGNO (operands[0]) == 0 - && REGNO (operands[1]) == 1 - && REGNO (operands[2]) == 2) - || (REGNO (operands[0]) == 4 - && REGNO (operands[1]) == 5 - && REGNO (operands[2]) == 6))" + && h8300_regs_ok_for_stm (3, operands)" [(parallel [(set (reg:HI SP_REG) (plus:HI (reg:HI SP_REG) (const_int -12))) @@ -3874,9 +3858,7 @@ (set (mem:SI (pre_dec:SI (reg:SI SP_REG))) (match_operand:SI 1 "register_operand" ""))] "TARGET_H8300S && !TARGET_NORMAL_MODE - && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1) - || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3) - || (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))" + && h8300_regs_ok_for_stm (2, operands)" [(parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -8))) @@ -3892,9 +3874,7 @@ (set (mem:SI (pre_dec:HI (reg:HI SP_REG))) (match_operand:SI 1 "register_operand" ""))] "TARGET_H8300S && TARGET_NORMAL_MODE - && ((REGNO (operands[0]) == 0 && REGNO (operands[1]) == 1) - || (REGNO (operands[0]) == 2 && REGNO (operands[1]) == 3) - || (REGNO (operands[0]) == 4 && REGNO (operands[1]) == 5))" + && h8300_regs_ok_for_stm (2, operands)" [(parallel [(set (reg:HI SP_REG) (plus:HI (reg:HI SP_REG) (const_int -8))) -- 2.30.2