From 5ab67cdee6144cfca0705612a898f1940d4f3994 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Wed, 13 Jan 2021 11:49:45 +0000 Subject: [PATCH] aarch64: Tighten condition on sve/sel* tests Noticed while testing on a different machine that the sve/sel_*.c tests require .variant_pcs support but don't test for it. .variant_pcs post-dates SVE so there shouldn't be a need to test for both. gcc/testsuite/ * gcc.target/aarch64/sve/sel_1.c: Require aarch64_variant_pcs. * gcc.target/aarch64/sve/sel_2.c: Likewise. * gcc.target/aarch64/sve/sel_3.c: Likewise. --- gcc/testsuite/gcc.target/aarch64/sve/sel_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/sel_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/sel_3.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/testsuite/gcc.target/aarch64/sve/sel_1.c b/gcc/testsuite/gcc.target/aarch64/sve/sel_1.c index 9c581c52fde..65208ddbdf1 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/sel_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/sel_1.c @@ -1,4 +1,4 @@ -/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-do assemble { target aarch64_variant_pcs } } */ /* { dg-options "-O2 -msve-vector-bits=256 --save-temps" } */ /* { dg-final { check-function-bodies "**" "" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/sel_2.c b/gcc/testsuite/gcc.target/aarch64/sve/sel_2.c index 60aaa878534..8087073b662 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/sel_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/sel_2.c @@ -1,4 +1,4 @@ -/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-do assemble { target aarch64_variant_pcs } } */ /* { dg-options "-O2 -msve-vector-bits=256 --save-temps" } */ /* { dg-final { check-function-bodies "**" "" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/sve/sel_3.c b/gcc/testsuite/gcc.target/aarch64/sve/sel_3.c index 36ec15b7da6..68f9d97ea72 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/sel_3.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/sel_3.c @@ -1,4 +1,4 @@ -/* { dg-do assemble { target aarch64_asm_sve_ok } } */ +/* { dg-do assemble { target aarch64_variant_pcs } } */ /* { dg-options "-O2 -msve-vector-bits=256 --save-temps" } */ /* { dg-final { check-function-bodies "**" "" } } */ -- 2.30.2