From 5b9cc93eb5980b5808bf3f78bbbe5e3f338b7914 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Tue, 13 Jul 2004 06:50:27 +0000 Subject: [PATCH] invoke.texi: Remove documentation for MIPS -mrnames option. * doc/invoke.texi: Remove documentation for MIPS -mrnames option. * config/mips/mips.h (mips_reg_names): Don't declare. (MASK_NAME_REGS): Delete. Shuffle other MASK_* values down. (TARGET_NAME_REGS): Delete. (TARGET_SWITCHES): Remove -mrnames. (REGISTER_NAMES): Initialise with the old contents of mips_reg_names[]. (ADDITIONAL_REGISTER_NAMES): Remove entries for names mentioned in REGISTER_NAMES. * config/mips/mips.c (mips_reg_names, mips_sw_reg_names): Delete. (override_options): Remove handling of TARGET_NAME_REGS. From-SVN: r84602 --- gcc/ChangeLog | 13 ++ gcc/config/mips/mips.c | 66 --------- gcc/config/mips/mips.h | 309 +++++++---------------------------------- gcc/doc/invoke.texi | 11 -- 4 files changed, 62 insertions(+), 337 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7caaa7f2e0e..317e736a0e5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2004-07-13 Richard Sandiford + + * doc/invoke.texi: Remove documentation for MIPS -mrnames option. + * config/mips/mips.h (mips_reg_names): Don't declare. + (MASK_NAME_REGS): Delete. Shuffle other MASK_* values down. + (TARGET_NAME_REGS): Delete. + (TARGET_SWITCHES): Remove -mrnames. + (REGISTER_NAMES): Initialise with the old contents of mips_reg_names[]. + (ADDITIONAL_REGISTER_NAMES): Remove entries for names mentioned + in REGISTER_NAMES. + * config/mips/mips.c (mips_reg_names, mips_sw_reg_names): Delete. + (override_options): Remove handling of TARGET_NAME_REGS. + 2004-07-13 Richard Sandiford * config/mips/mips.h (TARGET_*): Boolify. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index d152e351855..cad6e8d049c 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -531,64 +531,6 @@ static const char *mips_lo_relocs[NUM_SYMBOL_TYPES]; /* Likewise for HIGHs. */ static const char *mips_hi_relocs[NUM_SYMBOL_TYPES]; -/* Hardware names for the registers. If -mrnames is used, this - will be overwritten with mips_sw_reg_names. */ - -char mips_reg_names[][8] = -{ - "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", - "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", - "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", - "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", - "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", - "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", - "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", - "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", - "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", - "$fcc5","$fcc6","$fcc7","", "", "$arg", "$frame", "$fakec", - "$c0r0", "$c0r1", "$c0r2", "$c0r3", "$c0r4", "$c0r5", "$c0r6", "$c0r7", - "$c0r8", "$c0r9", "$c0r10","$c0r11","$c0r12","$c0r13","$c0r14","$c0r15", - "$c0r16","$c0r17","$c0r18","$c0r19","$c0r20","$c0r21","$c0r22","$c0r23", - "$c0r24","$c0r25","$c0r26","$c0r27","$c0r28","$c0r29","$c0r30","$c0r31", - "$c2r0", "$c2r1", "$c2r2", "$c2r3", "$c2r4", "$c2r5", "$c2r6", "$c2r7", - "$c2r8", "$c2r9", "$c2r10","$c2r11","$c2r12","$c2r13","$c2r14","$c2r15", - "$c2r16","$c2r17","$c2r18","$c2r19","$c2r20","$c2r21","$c2r22","$c2r23", - "$c2r24","$c2r25","$c2r26","$c2r27","$c2r28","$c2r29","$c2r30","$c2r31", - "$c3r0", "$c3r1", "$c3r2", "$c3r3", "$c3r4", "$c3r5", "$c3r6", "$c3r7", - "$c3r8", "$c3r9", "$c3r10","$c3r11","$c3r12","$c3r13","$c3r14","$c3r15", - "$c3r16","$c3r17","$c3r18","$c3r19","$c3r20","$c3r21","$c3r22","$c3r23", - "$c3r24","$c3r25","$c3r26","$c3r27","$c3r28","$c3r29","$c3r30","$c3r31" -}; - -/* Mips software names for the registers, used to overwrite the - mips_reg_names array. */ - -char mips_sw_reg_names[][8] = -{ - "$zero","$at", "$v0", "$v1", "$a0", "$a1", "$a2", "$a3", - "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7", - "$s0", "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7", - "$t8", "$t9", "$k0", "$k1", "$gp", "$sp", "$fp", "$ra", - "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", - "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", - "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", - "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", - "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", - "$fcc5","$fcc6","$fcc7","$rap", "", "$arg", "$frame", "$fakec", - "$c0r0", "$c0r1", "$c0r2", "$c0r3", "$c0r4", "$c0r5", "$c0r6", "$c0r7", - "$c0r8", "$c0r9", "$c0r10","$c0r11","$c0r12","$c0r13","$c0r14","$c0r15", - "$c0r16","$c0r17","$c0r18","$c0r19","$c0r20","$c0r21","$c0r22","$c0r23", - "$c0r24","$c0r25","$c0r26","$c0r27","$c0r28","$c0r29","$c0r30","$c0r31", - "$c2r0", "$c2r1", "$c2r2", "$c2r3", "$c2r4", "$c2r5", "$c2r6", "$c2r7", - "$c2r8", "$c2r9", "$c2r10","$c2r11","$c2r12","$c2r13","$c2r14","$c2r15", - "$c2r16","$c2r17","$c2r18","$c2r19","$c2r20","$c2r21","$c2r22","$c2r23", - "$c2r24","$c2r25","$c2r26","$c2r27","$c2r28","$c2r29","$c2r30","$c2r31", - "$c3r0", "$c3r1", "$c3r2", "$c3r3", "$c3r4", "$c3r5", "$c3r6", "$c3r7", - "$c3r8", "$c3r9", "$c3r10","$c3r11","$c3r12","$c3r13","$c3r14","$c3r15", - "$c3r16","$c3r17","$c3r18","$c3r19","$c3r20","$c3r21","$c3r22","$c3r23", - "$c3r24","$c3r25","$c3r26","$c3r27","$c3r28","$c3r29","$c3r30","$c3r31" -}; - /* Map hard register number to register class */ const enum reg_class mips_regno_to_class[] = { @@ -4837,14 +4779,6 @@ override_options (void) && (target_flags_explicit & MASK_EXPLICIT_RELOCS) == 0) target_flags &= ~MASK_EXPLICIT_RELOCS; - /* -mrnames says to use the MIPS software convention for register - names instead of the hardware names (ie, $a0 instead of $4). - We do this by switching the names in mips_reg_names, which the - reg_names points into via the REGISTER_NAMES macro. */ - - if (TARGET_NAME_REGS) - memcpy (mips_reg_names, mips_sw_reg_names, sizeof (mips_reg_names)); - /* -mvr4130-align is a "speed over size" optimization: it usually produces faster code, but at the expense of more nops. Enable it at -O3 and above. */ diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 7c411b176cd..829168d6867 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -98,7 +98,6 @@ struct mips_cpu_info { int isa; }; -extern char mips_reg_names[][8]; /* register names (a0 vs. $4). */ extern char mips_print_operand_punct[256]; /* print_operand punctuation chars */ extern const char *current_function_file; /* filename current function is in */ extern int num_source_filenames; /* current .file # */ @@ -145,34 +144,33 @@ extern const struct mips_cpu_info *mips_tune_info; #define MASK_NO_FUSED_MADD 0x00000008 /* Don't generate floating point multiply-add operations. */ #define MASK_GAS 0x00000010 /* Gas used instead of MIPS as */ -#define MASK_NAME_REGS 0x00000020 /* Use MIPS s/w reg name convention */ -#define MASK_EXPLICIT_RELOCS 0x00000040 /* Use relocation operators. */ -#define MASK_MEMCPY 0x00000080 /* call memcpy instead of inline code*/ -#define MASK_SOFT_FLOAT 0x00000100 /* software floating point */ -#define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */ -#define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */ -#define MASK_XGOT 0x00000800 /* emit big-got PIC */ -#define MASK_LONG_CALLS 0x00001000 /* Always call through a register */ -#define MASK_64BIT 0x00002000 /* Use 64 bit GP registers and insns */ -#define MASK_EMBEDDED_DATA 0x00004000 /* Reduce RAM usage, not fast code */ -#define MASK_BIG_ENDIAN 0x00008000 /* Generate big endian code */ -#define MASK_SINGLE_FLOAT 0x00010000 /* Only single precision FPU. */ -#define MASK_MAD 0x00020000 /* Generate mad/madu as on 4650. */ -#define MASK_4300_MUL_FIX 0x00040000 /* Work-around early Vr4300 CPU bug */ -#define MASK_MIPS16 0x00080000 /* Generate mips16 code */ +#define MASK_EXPLICIT_RELOCS 0x00000020 /* Use relocation operators. */ +#define MASK_MEMCPY 0x00000040 /* call memcpy instead of inline code*/ +#define MASK_SOFT_FLOAT 0x00000080 /* software floating point */ +#define MASK_FLOAT64 0x00000100 /* fp registers are 64 bits */ +#define MASK_ABICALLS 0x00000200 /* emit .abicalls/.cprestore/.cpload */ +#define MASK_XGOT 0x00000400 /* emit big-got PIC */ +#define MASK_LONG_CALLS 0x00000800 /* Always call through a register */ +#define MASK_64BIT 0x00001000 /* Use 64 bit GP registers and insns */ +#define MASK_EMBEDDED_DATA 0x00002000 /* Reduce RAM usage, not fast code */ +#define MASK_BIG_ENDIAN 0x00004000 /* Generate big endian code */ +#define MASK_SINGLE_FLOAT 0x00008000 /* Only single precision FPU. */ +#define MASK_MAD 0x00010000 /* Generate mad/madu as on 4650. */ +#define MASK_4300_MUL_FIX 0x00020000 /* Work-around early Vr4300 CPU bug */ +#define MASK_MIPS16 0x00040000 /* Generate mips16 code */ #define MASK_NO_CHECK_ZERO_DIV \ - 0x00100000 /* divide by zero checking */ -#define MASK_BRANCHLIKELY 0x00200000 /* Generate Branch Likely + 0x00080000 /* divide by zero checking */ +#define MASK_BRANCHLIKELY 0x00100000 /* Generate Branch Likely instructions. */ #define MASK_UNINIT_CONST_IN_RODATA \ - 0x00400000 /* Store uninitialized + 0x00200000 /* Store uninitialized consts in rodata */ -#define MASK_FIX_R4000 0x00800000 /* Work around R4000 errata. */ -#define MASK_FIX_R4400 0x01000000 /* Work around R4400 errata. */ -#define MASK_FIX_SB1 0x02000000 /* Work around SB-1 errata. */ -#define MASK_FIX_VR4120 0x04000000 /* Work around VR4120 errata. */ -#define MASK_VR4130_ALIGN 0x08000000 /* Perform VR4130 alignment opts. */ -#define MASK_FP_EXCEPTIONS 0x10000000 /* FP exceptions are enabled. */ +#define MASK_FIX_R4000 0x00400000 /* Work around R4000 errata. */ +#define MASK_FIX_R4400 0x00800000 /* Work around R4400 errata. */ +#define MASK_FIX_SB1 0x01000000 /* Work around SB-1 errata. */ +#define MASK_FIX_VR4120 0x02000000 /* Work around VR4120 errata. */ +#define MASK_VR4130_ALIGN 0x04000000 /* Perform VR4130 alignment opts. */ +#define MASK_FP_EXCEPTIONS 0x08000000 /* FP exceptions are enabled. */ /* Debug switches, not documented */ #define MASK_DEBUG 0 /* unused */ @@ -198,9 +196,6 @@ extern const struct mips_cpu_info *mips_tune_info; #define TARGET_DEBUG_MODE ((target_flags & MASK_DEBUG) != 0) #define TARGET_DEBUG_D_MODE ((target_flags & MASK_DEBUG_D) != 0) - /* Reg. Naming in .s ($21 vs. $a0) */ -#define TARGET_NAME_REGS ((target_flags & MASK_NAME_REGS) != 0) - /* call memcpy instead of inline code */ #define TARGET_MEMCPY ((target_flags & MASK_MEMCPY) != 0) @@ -553,10 +548,6 @@ extern const struct mips_cpu_info *mips_tune_info; N_("Use MIPS as")}, \ {"gas", MASK_GAS, \ N_("Use GNU as")}, \ - {"rnames", MASK_NAME_REGS, \ - N_("Use symbolic register names")}, \ - {"no-rnames", -MASK_NAME_REGS, \ - N_("Don't use symbolic register names")}, \ {"gpOPT", 0, \ N_("Use GP relative sdata/sbss sections (now ignored)")}, \ {"gpopt", 0, \ @@ -2792,237 +2783,37 @@ typedef struct mips_args { #define ASM_APP_OFF " #NO_APP\n" #endif -/* How to refer to registers in assembler output. - This sequence is indexed by compiler's hard-register-number (see above). - - In order to support the two different conventions for register names, - we use the name of a table set up in mips.c, which is overwritten - if -mrnames is used. */ - -#define REGISTER_NAMES \ -{ \ - &mips_reg_names[ 0][0], \ - &mips_reg_names[ 1][0], \ - &mips_reg_names[ 2][0], \ - &mips_reg_names[ 3][0], \ - &mips_reg_names[ 4][0], \ - &mips_reg_names[ 5][0], \ - &mips_reg_names[ 6][0], \ - &mips_reg_names[ 7][0], \ - &mips_reg_names[ 8][0], \ - &mips_reg_names[ 9][0], \ - &mips_reg_names[10][0], \ - &mips_reg_names[11][0], \ - &mips_reg_names[12][0], \ - &mips_reg_names[13][0], \ - &mips_reg_names[14][0], \ - &mips_reg_names[15][0], \ - &mips_reg_names[16][0], \ - &mips_reg_names[17][0], \ - &mips_reg_names[18][0], \ - &mips_reg_names[19][0], \ - &mips_reg_names[20][0], \ - &mips_reg_names[21][0], \ - &mips_reg_names[22][0], \ - &mips_reg_names[23][0], \ - &mips_reg_names[24][0], \ - &mips_reg_names[25][0], \ - &mips_reg_names[26][0], \ - &mips_reg_names[27][0], \ - &mips_reg_names[28][0], \ - &mips_reg_names[29][0], \ - &mips_reg_names[30][0], \ - &mips_reg_names[31][0], \ - &mips_reg_names[32][0], \ - &mips_reg_names[33][0], \ - &mips_reg_names[34][0], \ - &mips_reg_names[35][0], \ - &mips_reg_names[36][0], \ - &mips_reg_names[37][0], \ - &mips_reg_names[38][0], \ - &mips_reg_names[39][0], \ - &mips_reg_names[40][0], \ - &mips_reg_names[41][0], \ - &mips_reg_names[42][0], \ - &mips_reg_names[43][0], \ - &mips_reg_names[44][0], \ - &mips_reg_names[45][0], \ - &mips_reg_names[46][0], \ - &mips_reg_names[47][0], \ - &mips_reg_names[48][0], \ - &mips_reg_names[49][0], \ - &mips_reg_names[50][0], \ - &mips_reg_names[51][0], \ - &mips_reg_names[52][0], \ - &mips_reg_names[53][0], \ - &mips_reg_names[54][0], \ - &mips_reg_names[55][0], \ - &mips_reg_names[56][0], \ - &mips_reg_names[57][0], \ - &mips_reg_names[58][0], \ - &mips_reg_names[59][0], \ - &mips_reg_names[60][0], \ - &mips_reg_names[61][0], \ - &mips_reg_names[62][0], \ - &mips_reg_names[63][0], \ - &mips_reg_names[64][0], \ - &mips_reg_names[65][0], \ - &mips_reg_names[66][0], \ - &mips_reg_names[67][0], \ - &mips_reg_names[68][0], \ - &mips_reg_names[69][0], \ - &mips_reg_names[70][0], \ - &mips_reg_names[71][0], \ - &mips_reg_names[72][0], \ - &mips_reg_names[73][0], \ - &mips_reg_names[74][0], \ - &mips_reg_names[75][0], \ - &mips_reg_names[76][0], \ - &mips_reg_names[77][0], \ - &mips_reg_names[78][0], \ - &mips_reg_names[79][0], \ - &mips_reg_names[80][0], \ - &mips_reg_names[81][0], \ - &mips_reg_names[82][0], \ - &mips_reg_names[83][0], \ - &mips_reg_names[84][0], \ - &mips_reg_names[85][0], \ - &mips_reg_names[86][0], \ - &mips_reg_names[87][0], \ - &mips_reg_names[88][0], \ - &mips_reg_names[89][0], \ - &mips_reg_names[90][0], \ - &mips_reg_names[91][0], \ - &mips_reg_names[92][0], \ - &mips_reg_names[93][0], \ - &mips_reg_names[94][0], \ - &mips_reg_names[95][0], \ - &mips_reg_names[96][0], \ - &mips_reg_names[97][0], \ - &mips_reg_names[98][0], \ - &mips_reg_names[99][0], \ - &mips_reg_names[100][0], \ - &mips_reg_names[101][0], \ - &mips_reg_names[102][0], \ - &mips_reg_names[103][0], \ - &mips_reg_names[104][0], \ - &mips_reg_names[105][0], \ - &mips_reg_names[106][0], \ - &mips_reg_names[107][0], \ - &mips_reg_names[108][0], \ - &mips_reg_names[109][0], \ - &mips_reg_names[110][0], \ - &mips_reg_names[111][0], \ - &mips_reg_names[112][0], \ - &mips_reg_names[113][0], \ - &mips_reg_names[114][0], \ - &mips_reg_names[115][0], \ - &mips_reg_names[116][0], \ - &mips_reg_names[117][0], \ - &mips_reg_names[118][0], \ - &mips_reg_names[119][0], \ - &mips_reg_names[120][0], \ - &mips_reg_names[121][0], \ - &mips_reg_names[122][0], \ - &mips_reg_names[123][0], \ - &mips_reg_names[124][0], \ - &mips_reg_names[125][0], \ - &mips_reg_names[126][0], \ - &mips_reg_names[127][0], \ - &mips_reg_names[128][0], \ - &mips_reg_names[129][0], \ - &mips_reg_names[130][0], \ - &mips_reg_names[131][0], \ - &mips_reg_names[132][0], \ - &mips_reg_names[133][0], \ - &mips_reg_names[134][0], \ - &mips_reg_names[135][0], \ - &mips_reg_names[136][0], \ - &mips_reg_names[137][0], \ - &mips_reg_names[138][0], \ - &mips_reg_names[139][0], \ - &mips_reg_names[140][0], \ - &mips_reg_names[141][0], \ - &mips_reg_names[142][0], \ - &mips_reg_names[143][0], \ - &mips_reg_names[144][0], \ - &mips_reg_names[145][0], \ - &mips_reg_names[146][0], \ - &mips_reg_names[147][0], \ - &mips_reg_names[148][0], \ - &mips_reg_names[149][0], \ - &mips_reg_names[150][0], \ - &mips_reg_names[151][0], \ - &mips_reg_names[152][0], \ - &mips_reg_names[153][0], \ - &mips_reg_names[154][0], \ - &mips_reg_names[155][0], \ - &mips_reg_names[156][0], \ - &mips_reg_names[157][0], \ - &mips_reg_names[158][0], \ - &mips_reg_names[159][0], \ - &mips_reg_names[160][0], \ - &mips_reg_names[161][0], \ - &mips_reg_names[162][0], \ - &mips_reg_names[163][0], \ - &mips_reg_names[164][0], \ - &mips_reg_names[165][0], \ - &mips_reg_names[166][0], \ - &mips_reg_names[167][0], \ - &mips_reg_names[168][0], \ - &mips_reg_names[169][0], \ - &mips_reg_names[170][0], \ - &mips_reg_names[171][0], \ - &mips_reg_names[172][0], \ - &mips_reg_names[173][0], \ - &mips_reg_names[174][0], \ - &mips_reg_names[175][0] \ -} - -/* If defined, a C initializer for an array of structures - containing a name and a register number. This macro defines - additional names for hard registers, thus allowing the `asm' - option in declarations to refer to registers using alternate - names. - - We define both names for the integer registers here. */ +#define REGISTER_NAMES \ +{ "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", \ + "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ + "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ + "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31", \ + "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \ + "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ + "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \ + "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \ + "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", \ + "$fcc5","$fcc6","$fcc7","", "", "$arg", "$frame", "$fakec", \ + "$c0r0", "$c0r1", "$c0r2", "$c0r3", "$c0r4", "$c0r5", "$c0r6", "$c0r7", \ + "$c0r8", "$c0r9", "$c0r10","$c0r11","$c0r12","$c0r13","$c0r14","$c0r15", \ + "$c0r16","$c0r17","$c0r18","$c0r19","$c0r20","$c0r21","$c0r22","$c0r23", \ + "$c0r24","$c0r25","$c0r26","$c0r27","$c0r28","$c0r29","$c0r30","$c0r31", \ + "$c2r0", "$c2r1", "$c2r2", "$c2r3", "$c2r4", "$c2r5", "$c2r6", "$c2r7", \ + "$c2r8", "$c2r9", "$c2r10","$c2r11","$c2r12","$c2r13","$c2r14","$c2r15", \ + "$c2r16","$c2r17","$c2r18","$c2r19","$c2r20","$c2r21","$c2r22","$c2r23", \ + "$c2r24","$c2r25","$c2r26","$c2r27","$c2r28","$c2r29","$c2r30","$c2r31", \ + "$c3r0", "$c3r1", "$c3r2", "$c3r3", "$c3r4", "$c3r5", "$c3r6", "$c3r7", \ + "$c3r8", "$c3r9", "$c3r10","$c3r11","$c3r12","$c3r13","$c3r14","$c3r15", \ + "$c3r16","$c3r17","$c3r18","$c3r19","$c3r20","$c3r21","$c3r22","$c3r23", \ + "$c3r24","$c3r25","$c3r26","$c3r27","$c3r28","$c3r29","$c3r30","$c3r31" } + +/* List the "software" names for each register. Also list the numerical + names for $fp and $sp. */ #define ADDITIONAL_REGISTER_NAMES \ { \ - { "$0", 0 + GP_REG_FIRST }, \ - { "$1", 1 + GP_REG_FIRST }, \ - { "$2", 2 + GP_REG_FIRST }, \ - { "$3", 3 + GP_REG_FIRST }, \ - { "$4", 4 + GP_REG_FIRST }, \ - { "$5", 5 + GP_REG_FIRST }, \ - { "$6", 6 + GP_REG_FIRST }, \ - { "$7", 7 + GP_REG_FIRST }, \ - { "$8", 8 + GP_REG_FIRST }, \ - { "$9", 9 + GP_REG_FIRST }, \ - { "$10", 10 + GP_REG_FIRST }, \ - { "$11", 11 + GP_REG_FIRST }, \ - { "$12", 12 + GP_REG_FIRST }, \ - { "$13", 13 + GP_REG_FIRST }, \ - { "$14", 14 + GP_REG_FIRST }, \ - { "$15", 15 + GP_REG_FIRST }, \ - { "$16", 16 + GP_REG_FIRST }, \ - { "$17", 17 + GP_REG_FIRST }, \ - { "$18", 18 + GP_REG_FIRST }, \ - { "$19", 19 + GP_REG_FIRST }, \ - { "$20", 20 + GP_REG_FIRST }, \ - { "$21", 21 + GP_REG_FIRST }, \ - { "$22", 22 + GP_REG_FIRST }, \ - { "$23", 23 + GP_REG_FIRST }, \ - { "$24", 24 + GP_REG_FIRST }, \ - { "$25", 25 + GP_REG_FIRST }, \ - { "$26", 26 + GP_REG_FIRST }, \ - { "$27", 27 + GP_REG_FIRST }, \ - { "$28", 28 + GP_REG_FIRST }, \ { "$29", 29 + GP_REG_FIRST }, \ { "$30", 30 + GP_REG_FIRST }, \ - { "$31", 31 + GP_REG_FIRST }, \ - { "$sp", 29 + GP_REG_FIRST }, \ - { "$fp", 30 + GP_REG_FIRST }, \ { "at", 1 + GP_REG_FIRST }, \ { "v0", 2 + GP_REG_FIRST }, \ { "v1", 3 + GP_REG_FIRST }, \ @@ -3054,8 +2845,6 @@ typedef struct mips_args { { "sp", 29 + GP_REG_FIRST }, \ { "fp", 30 + GP_REG_FIRST }, \ { "ra", 31 + GP_REG_FIRST }, \ - { "$sp", 29 + GP_REG_FIRST }, \ - { "$fp", 30 + GP_REG_FIRST } \ ALL_COP_ADDITIONAL_REGISTER_NAMES \ } diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 1ab899a7072..0ffc8524039 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -537,7 +537,6 @@ in the following sections. -muninit-const-in-rodata -mno-uninit-const-in-rodata @gol -msplit-addresses -mno-split-addresses @gol -mexplicit-relocs -mno-explicit-relocs @gol --mrnames -mno-rnames @gol -mcheck-zero-division -mno-check-zero-division @gol -mmemcpy -mno-memcpy -mlong-calls -mno-long-calls @gol -mmad -mno-mad -mfused-madd -mno-fused-madd -nocpp @gol @@ -9163,16 +9162,6 @@ depends on whether a symbol is local or global. In some rare cases, GCC will not be able to decide this until the whole compilation unit has been read. -@item -mrnames -@itemx -mno-rnames -@opindex mrnames -@opindex mno-rnames -Generate (do not generate) code that refers to registers using their -software names. The default is @option{-mno-rnames}, which tells GCC -to use hardware names like @samp{$4} instead of software names like -@samp{a0}. The only assembler known to support @option{-rnames} is -the Algorithmics assembler. - @item -mcheck-zero-division @itemx -mno-check-zero-division @opindex mcheck-zero-division -- 2.30.2