From 5c15b1276ed56064382197d73d9d357201e5f71f Mon Sep 17 00:00:00 2001 From: Stephane Marchesin Date: Mon, 17 Mar 2008 03:32:07 +0100 Subject: [PATCH] nv10: fixes. --- src/gallium/drivers/nv10/nv10_context.h | 3 ++- src/gallium/drivers/nv10/nv10_state_emit.c | 10 +++++----- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/nv10/nv10_context.h b/src/gallium/drivers/nv10/nv10_context.h index 8269d6121f0..386138556e5 100644 --- a/src/gallium/drivers/nv10/nv10_context.h +++ b/src/gallium/drivers/nv10/nv10_context.h @@ -47,11 +47,12 @@ struct nv10_context { uint32_t rt_enable; struct pipe_buffer *rt[4]; struct pipe_buffer *zeta; + uint32_t lma_offset; struct { struct pipe_buffer *buffer; uint32_t format; - } tex[16]; + } tex[2]; unsigned vb_enable; struct { diff --git a/src/gallium/drivers/nv10/nv10_state_emit.c b/src/gallium/drivers/nv10/nv10_state_emit.c index 1d104e2f913..8bf0bd2d683 100644 --- a/src/gallium/drivers/nv10/nv10_state_emit.c +++ b/src/gallium/drivers/nv10/nv10_state_emit.c @@ -49,21 +49,21 @@ nv10_emit_hw_state(struct nv10_context *nv10) OUT_RELOCl(nv10->zeta, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); /* XXX for when we allocate LMA on nv17 */ /* BEGIN_RING(celsius, NV10TCL_LMA_DEPTH_OFFSET, 1); - OUT_RELOCl(nv10->zeta+...);*/ + OUT_RELOCl(nv10->zeta+lma_offset);*/ } /* Texture images */ for (i = 0; i < 2; i++) { if (!(nv10->fp_samplers & (1 << i))) continue; - BEGIN_RING(celsius, NV10TCL_TX_OFFSET(i), 2); + BEGIN_RING(celsius, NV10TCL_TX_OFFSET(i), 1); OUT_RELOCl(nv10->tex[i].buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD); - // XXX -/* OUT_RELOCd(nv10->tex[i].buffer, nv10->tex[i].format, + BEGIN_RING(celsius, NV10TCL_TX_FORMAT(i), 1); + OUT_RELOCd(nv10->tex[i].buffer, nv10->tex[i].format, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_OR, NV10TCL_TX_FORMAT_DMA0, - NV10TCL_TX_FORMAT_DMA1);*/ + NV10TCL_TX_FORMAT_DMA1); } } -- 2.30.2