From 5c2556697f7f23dc449704a4ca2e58eaf2ef342f Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Wed, 16 Oct 1996 22:14:23 +0000 Subject: [PATCH] Make read/write memory functions inlined --- sim/d10v/.Sanitize | 1 + sim/d10v/ChangeLog | 14 ++++++++++++++ sim/d10v/Makefile.in | 11 ++++++----- sim/d10v/d10v_sim.h | 36 +++++++++++++++++++----------------- 4 files changed, 40 insertions(+), 22 deletions(-) diff --git a/sim/d10v/.Sanitize b/sim/d10v/.Sanitize index 9cbc26d1e75..653c1da1371 100644 --- a/sim/d10v/.Sanitize +++ b/sim/d10v/.Sanitize @@ -28,6 +28,7 @@ Makefile.in configure configure.in d10v_sim.h +endian.c gencode.c interp.c simops.c diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index d82761ce936..fe621e33369 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,5 +1,19 @@ Wed Oct 16 13:50:06 1996 Michael Meissner + * endian.c: New file. Move endian functions here from interp.c. + Optimize code, and make it work as either inline functions or as a + separate file. + + * interp.c: Move endian functions from here to endian.c. + + * Makefile.in (INCLUDE): Add endian.c. + (run,libsim.a): Add dependency on endian.o. + (endian.o): Add dependency. + + * d10v_sim.h (read/write support): Always go through the machine + independent endian functions. If compiling with GCC and + optimizing, include endian.c so the endian functions are inlined. + * simops.c (OP_5F00): Correct tracing of accumulators. Tue Oct 15 10:57:50 1996 Michael Meissner diff --git a/sim/d10v/Makefile.in b/sim/d10v/Makefile.in index 19972b2948a..14d33b5f68f 100644 --- a/sim/d10v/Makefile.in +++ b/sim/d10v/Makefile.in @@ -80,7 +80,7 @@ X_LIB= MATH_LIB= -INCLUDE = d10v_sim.h $(srcdir)/../../gdb/callback.h +INCLUDE = d10v_sim.h $(srcdir)/../../gdb/callback.h endian.c INCDIR = $(srcdir)/../../include CSEARCH = -I. -I$(srcdir) -I../../include \ -I../../bfd -I$(INCDIR) -I$(srcdir)/../../bfd -I$(srcdir)/../../gdb -I$(srcdir)/../../newlib/libc/sys/d10v \ @@ -92,8 +92,8 @@ BFD_LIB = ../../bfd/libbfd.a all: run libsim.a -run: interp.o $(X) run.o table.o callback.o simops.o - $(CC) $(CFLAGS) $(CONFIG_CFLAGS) -o run $(X) interp.o table.o callback.o simops.o run.o \ +run: interp.o $(X) run.o table.o callback.o simops.o endian.o $(LIBIBERTY_LIB) $(BFD_LIB) + $(CC) $(CFLAGS) $(CONFIG_CFLAGS) -o run $(X) interp.o table.o callback.o simops.o run.o endian.o \ $(BFD_LIB) $(LIBIBERTY_LIB) $(X_LIB) $(MATH_LIB) interp.o:interp.c table.c $(INCLUDE) @@ -101,11 +101,12 @@ run.o: $(srcdir)/../common/run.c $(INCLUDE) $(CC) -c $(CFLAGS) $(CONFIG_CFLAGS) $< simops.o: simops.c $(INCLUDE) +endian.o: endian.c $(INCLUDE) callback.o: $(srcdir)/../../gdb/callback.c $(INCLUDE) $(CC) -c $(CFLAGS) $(CONFIG_CFLAGS) $< -libsim.a:interp.o table.o simops.o - $(AR) $(ARFLAGS) libsim.a interp.o table.o simops.o +libsim.a:interp.o table.o simops.o endian.o + $(AR) $(ARFLAGS) libsim.a interp.o table.o simops.o endian.o $(RANLIB) libsim.a simops.h: gencode diff --git a/sim/d10v/d10v_sim.h b/sim/d10v/d10v_sim.h index 4913fa8525e..038f23a918f 100644 --- a/sim/d10v/d10v_sim.h +++ b/sim/d10v/d10v_sim.h @@ -7,8 +7,13 @@ #define DEBUG_TRACE 0x00000001 #define DEBUG_VALUES 0x00000002 -#define DEBUG_MEMSIZE 0x00000004 -#define DEBUG_INSTRUCTION 0x00000008 +#define DEBUG_LINE_NUMBER 0x00000004 +#define DEBUG_MEMSIZE 0x00000008 +#define DEBUG_INSTRUCTION 0x00000010 + +#ifndef DEBUG +#define DEBUG (DEBUG_TRACE | DEBUG_VALUES | DEBUG_LINE_NUMBER) +#endif extern int d10v_debug; @@ -83,8 +88,8 @@ extern long left_nops, right_nops; struct _state { reg_t regs[16]; /* general-purpose registers */ - reg_t cregs[16]; /* control registers */ - int64 a[2]; /* accumulators */ + reg_t cregs[16]; /* control registers */ + int64 a[2]; /* accumulators */ uint8 SM; uint8 EA; uint8 DB; @@ -99,6 +104,8 @@ struct _state uint8 exe; uint8 *imem; uint8 *dmem; + uint32 mem_min; + uint32 mem_max; int exception; enum _ins_type ins_type; } State; @@ -118,6 +125,9 @@ extern struct simops Simops[]; #define MOD_E (State.cregs[11]) #define IBA (State.cregs[14]) +#define SIG_D10V_STOP -1 +#define SIG_D10V_EXIT -2 + #define SEXT3(x) ((((x)&0x7)^(~3))+4) /* sign-extend a 4-bit number */ @@ -151,25 +161,19 @@ extern struct simops Simops[]; #define RB(x) (*((uint8 *)((x)+State.imem))) #define SB(addr,data) ( RB(addr) = (data & 0xff)) -#ifdef WORDS_BIGENDIAN - -#define RW(x) (*((uint16 *)((x)+State.imem))) -#define RLW(x) (*((uint32 *)((x)+State.imem))) -#define SW(addr,data) RW(addr)=data -#define SLW(addr,data) RLW(addr)=data -#define READ_16(x) (*((int16 *)(x))) -#define WRITE_16(addr,data) (*(int16 *)(addr)=data) -#define READ_64(x) (*((int64 *)(x))) -#define WRITE_64(addr,data) (*(int64 *)(addr)=data) +#if defined(__GNUC__) && defined(__OPTIMIZE__) && !defined(NO_ENDIAN_INLINE) +#define ENDIAN_INLINE static __inline__ +#include "endian.c" +#undef ENDIAN_INLINE #else - uint32 get_longword PARAMS ((uint8 *)); uint16 get_word PARAMS ((uint8 *)); int64 get_longlong PARAMS ((uint8 *)); void write_word PARAMS ((uint8 *addr, uint16 data)); void write_longword PARAMS ((uint8 *addr, uint32 data)); void write_longlong PARAMS ((uint8 *addr, int64 data)); +#endif #define SW(addr,data) write_word((long)(addr)+State.imem,data) #define RW(x) get_word((long)(x)+State.imem) @@ -179,5 +183,3 @@ void write_longlong PARAMS ((uint8 *addr, int64 data)); #define WRITE_16(addr,data) write_word(addr,data) #define READ_64(x) get_longlong(x) #define WRITE_64(addr,data) write_longlong(addr,data) - -#endif /* not WORDS_BIGENDIAN */ -- 2.30.2