From 5c62923d12d769ff45ae1c6afb2bde0b8c5e4e98 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 19 Dec 2020 19:58:52 +0000 Subject: [PATCH] --- openpower/sv/mv.vec.mdwn | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/openpower/sv/mv.vec.mdwn b/openpower/sv/mv.vec.mdwn index 144d793de..82f55cd7d 100644 --- a/openpower/sv/mv.vec.mdwn +++ b/openpower/sv/mv.vec.mdwn @@ -1,6 +1,6 @@ # Vector mv operations -In the SIMD VSX set, section 6.8.1 and 6.8.2 p254 of v3.0B has a series of pack and unpack operations. This page covers those and more. [[svp64]] privides the Vector Context to also add saturation as well as predication. +In the SIMD VSX set, section 6.8.1 and 6.8.2 p254 of v3.0B has a series of pack and unpack operations. This page covers those and more. [[svp64]] provides the Vector Context to also add saturation as well as predication. See @@ -27,6 +27,7 @@ mv.destvec (leaving out elwidths and chop): for i in range(VL): regs[rd+i*SUBVL] = regs[rs+i] +Note that these mv operations only become significant when elwidth is set on the vector to a small value. SUBVL=4, src elwidth=8, dest elwidth=32 for example. ## Twin Predication, saturation, swizzle, and elwidth overrides -- 2.30.2