From 5d01fc276cc1dbf5962914ef29252ec7138ee5bc Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 27 Jun 2022 11:30:49 +0100 Subject: [PATCH] --- openpower/sv/mv.swizzle.mdwn | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/openpower/sv/mv.swizzle.mdwn b/openpower/sv/mv.swizzle.mdwn index 0be17eb1c..0da1025f8 100644 --- a/openpower/sv/mv.swizzle.mdwn +++ b/openpower/sv/mv.swizzle.mdwn @@ -137,7 +137,8 @@ encoded into the Swizzle. When Vectorised, given the use-case is for a High-performance GPU, the fundamental assumption is that Micro-coding or other technique will -be deployed in hardware to issue multiple Scalar MV operations which +be deployed in hardware to issue multiple Scalar MV operations and +full parallel crossbars, which would be impractical in a smaller Scalar-only Micro-architecture. Therefore the restriction imposed on the Scalar `mv.swiz` to 32-bit quantities as the default is lifted on `sv.mv.swiz`. -- 2.30.2