From 5d80780f89ae91dc1632265fa2a6b0ffcab6dfa6 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 12 Jun 2020 21:09:46 -0700 Subject: [PATCH] arm: Add missing overrides to the ARM interrupt object. Change-Id: Idddc5267d5eb287a0895a1a2e1631ca9a2e789f3 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30294 Reviewed-by: Jason Lowe-Power Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- src/arch/arm/interrupts.hh | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh index 814fd71a5..8e78f966a 100644 --- a/src/arch/arm/interrupts.hh +++ b/src/arch/arm/interrupts.hh @@ -77,7 +77,7 @@ class Interrupts : public BaseInterrupts void - post(int int_num, int index) + post(int int_num, int index) override { DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index); @@ -92,7 +92,7 @@ class Interrupts : public BaseInterrupts } void - clear(int int_num, int index) + clear(int int_num, int index) override { DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index); @@ -107,7 +107,7 @@ class Interrupts : public BaseInterrupts } void - clearAll() + clearAll() override { DPRINTF(Interrupt, "Interrupts all cleared\n"); intStatus = 0; @@ -123,7 +123,7 @@ class Interrupts : public BaseInterrupts bool takeInt(InterruptTypes int_type) const; bool - checkInterrupts() const + checkInterrupts() const override { HCR hcr = tc->readMiscReg(MISCREG_HCR); -- 2.30.2