From 5d95fcef5c0834899ad034cbef6b465ee8876d95 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 17 Jun 2022 21:18:40 +0100
Subject: [PATCH]

---
 openpower/sv/branches.mdwn | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn
index 53fab3333..75edd273c 100644
--- a/openpower/sv/branches.mdwn
+++ b/openpower/sv/branches.mdwn
@@ -168,6 +168,8 @@ Conditional:
 |ALL|SNZ|CTi| / |    |    | 1  | 0  | /   | LRu sz | CTR-test mode         |
 |ALL|SNZ|CTi|VSb|    |    | 1  | 1  | VLI | LRu sz | CTR-test+VLSET mode   |
 
+TODO bits 17,18 for SVSTATE-variant of LR and LRu.
+
 Brief description of fields:
 
 * **sz=1** if predication is enabled and `sz=1` and a predicate
-- 
2.30.2