From 5da3dd8cd3605ac46832dc3cdce35a831ce1aa3e Mon Sep 17 00:00:00 2001 From: "yimmanuel3@f4ac60d763911c3fa518755176e4b9ed455c75d8" Date: Mon, 3 Feb 2020 05:02:25 +0000 Subject: [PATCH] --- About_Us.mdwn | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/About_Us.mdwn b/About_Us.mdwn index 55167bbdf..b64204eb3 100644 --- a/About_Us.mdwn +++ b/About_Us.mdwn @@ -17,31 +17,3 @@ ## We're Delivering: a (quad core, 800mhz, dual issue, GPU, VPU, [and later an ML inference core] ) SOC. - -## Why a Libre SOC? - -Its quite hard to guarantee that a performant processors (think pipelined, out-of-order) are functionally perfectly correct. In fact, it often turns out that they [aren’t](https://meltdownattack.com). - -There are entire [dissertations](http://www.kroening.com/diss/diss-kroe.pdf) dedicated to the subject matter of merely functionally verifying a pipeline (this doesn’t even consider out of order execution). - -Given the fact that performant bug-free processors no longer exist, how can you trust your processor? The next best thing is to have access to a processor’s design files. Not only have access to them, you must have the freedom to study and improve them. - -Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire LibreSOC. - -## Benefits: Privacy, Safety-Critical, Peace of Mind... -Our LibreSOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html). - -There is a very real need for reliable safety critical processors (think airplane, smart car, nuclear power plant, pacemaker...). -LibreSOC posits that it is impossible to trust a processor in a safety critical environment without both access -to that processor's source and a cycle accurate HDL simulator that guarantees developers their code behaves as they -expect. An ISA level simulator is no longer satisfactory. - -Refer to this [IEEE article](https://ieeexplore.ieee.org/document/4519604) by Cyberphysical System expert Ed-Lee for more details. - -## Still Have Questions? - -Read about the business and practical benefits of a LibreSOC below. - -[[why_a_libresoc]] - -See our [[3d_gpu/mission_statement]] -- 2.30.2