From 5e0cd58de4261e9dca7a15037192e7e9426a0207 Mon Sep 17 00:00:00 2001 From: Chad Versace Date: Mon, 23 Dec 2013 17:46:51 -0800 Subject: [PATCH] i965/gen6/blorp: Set need_workaround_flush immediately after primitive This patch makes the workaround code in gen6 blorp follow the pattern established in the regular draw path. It shouldn't result in any behavioral change. On gen6, there are two places where we emit 3D_CMD_PRIM: brw_emit_prim() and gen6_blorp_emit_primitive(). brw_emit_prim() sets need_workaround_flush immediately after emitting the primitive, but blorp does not. Blorp sets need_workaround_flush at the bottom of brw_blorp_exec(). This patch moves the need_workaround_flush from brw_blorp_exec() to gen6_blorp_emit_primitive(). There is no need to set need_workaround_flush in gen7_blorp_emit_primitive() because the workaround applies only to gen6. Reviewed-by: Paul Berry Signed-off-by: Chad Versace --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 1 - src/mesa/drivers/dri/i965/gen6_blorp.cpp | 3 +++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index ab3e75c3b6e..0939a317867 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -274,7 +274,6 @@ retry: */ brw->state.dirty.brw = ~0; brw->state.dirty.cache = ~0; - brw->batch.need_workaround_flush = true; brw->ib.type = -1; intel_batchbuffer_clear_cache(brw); diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 441d61fb018..929d7b5a679 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -1010,6 +1010,9 @@ gen6_blorp_emit_primitive(struct brw_context *brw, OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); + + /* Only used on Sandybridge; harmless to set elsewhere. */ + brw->batch.need_workaround_flush = true; } static void -- 2.30.2