From 5e645e50fb7387fec097496867783b53b36a1a0e Mon Sep 17 00:00:00 2001 From: Torbjorn Granlund Date: Wed, 6 Nov 1996 22:56:24 +0000 Subject: [PATCH] (parallel inc and branch-if-zero/nonzero): Add two new pattern variants. (parallel inc and branch-if-zero/nonzero): Add two new pattern variants. Change incrementing pattern to use incl/jnz. From-SVN: r13104 --- gcc/config/i386/i386.md | 42 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 38 insertions(+), 4 deletions(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 757e2cd7966..b06d9b8888e 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5771,6 +5771,40 @@ return \"jc %l1\"; }") +(define_insn "" + [(set (pc) + (if_then_else (ne (match_operand:SI 0 "general_operand" "g") + (const_int 1)) + (label_ref (match_operand 1 "" "")) + (pc))) + (set (match_dup 0) + (plus:SI (match_dup 0) + (const_int -1)))] + "" + "* +{ + operands[2] = const1_rtx; + output_asm_insn (AS1 (dec%L0,%0), operands); + return \"jnz %l1\"; +}") + +(define_insn "" + [(set (pc) + (if_then_else (eq (match_operand:SI 0 "general_operand" "g") + (const_int 1)) + (label_ref (match_operand 1 "" "")) + (pc))) + (set (match_dup 0) + (plus:SI (match_dup 0) + (const_int -1)))] + "" + "* +{ + operands[2] = const1_rtx; + output_asm_insn (AS1 (dec%L0,%0), operands); + return \"jz %l1\"; +}") + (define_insn "" [(set (pc) (if_then_else (ne (match_operand:SI 0 "general_operand" "g") @@ -5784,8 +5818,8 @@ "* { operands[2] = const1_rtx; - output_asm_insn (AS2 (add%L0,%2,%0), operands); - return \"jnc %l1\"; + output_asm_insn (AS1 (inc%L0,%0), operands); + return \"jnz %l1\"; }") (define_insn "" @@ -5801,8 +5835,8 @@ "* { operands[2] = const1_rtx; - output_asm_insn (AS2 (add%L0,%2,%0), operands); - return \"jc %l1\"; + output_asm_insn (AS1 (inc%L0,%0), operands); + return \"jz %l1\"; }") ;; Implement switch statements when generating PIC code. Switches are -- 2.30.2