From 5e8c2eb17e0eb237fe89458caadcb935fb9e20ff Mon Sep 17 00:00:00 2001 From: Zdenek Sojka Date: Tue, 5 Apr 2016 18:58:50 +0200 Subject: [PATCH] re PR tree-optimization/70509 (wrong code with extract from a v64qi) PR tree-optimization/70509 * tree-ssa-forwprop.c (simplify_bitfield_ref): Use bitsize_int instead of the vector base type for index. * gcc.target/i386/avx512bw-pr70509.c: New test. From-SVN: r234754 --- gcc/ChangeLog | 6 +++++ gcc/testsuite/ChangeLog | 5 ++++ .../gcc.target/i386/avx512bw-pr70509.c | 26 +++++++++++++++++++ gcc/tree-ssa-forwprop.c | 5 ++-- 4 files changed, 39 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx512bw-pr70509.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 711f6ed0510..c2a26d5ee78 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-04-05 Zdenek Sojka + + PR tree-optimization/70509 + * tree-ssa-forwprop.c (simplify_bitfield_ref): Use bitsize_int instead + of the vector base type for index. + 2016-04-05 Uros Bizjak PR target/70510 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 957823d7fe2..92ea4a51b23 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-04-05 Zdenek Sojka + + PR tree-optimization/70509 + * gcc.target/i386/avx512bw-pr70509.c: New test. + 2016-04-05 Patrick Palka PR c++/70452 diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr70509.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr70509.c new file mode 100644 index 00000000000..d7bd659f73a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr70509.c @@ -0,0 +1,26 @@ +/* PR tree-optimization/70509 */ +/* { dg-do run } */ +/* { dg-options "-O1 -mavx512bw" } */ +/* { dg-require-effective-target avx512bw } */ + +#define AVX512BW +#include "avx512f-helper.h" + +typedef char V __attribute__ ((vector_size (64))); + +int __attribute__ ((noinline, noclone)) +foo (V u, V v) +{ + u /= v[0x20]; + return u[0]; +} + +void +TEST (void) +{ + int x = foo ((V) { 9 }, (V) { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 3 }); + if (x != 3) + abort (); +} diff --git a/gcc/tree-ssa-forwprop.c b/gcc/tree-ssa-forwprop.c index f64ee0a8114..c40f9e20d22 100644 --- a/gcc/tree-ssa-forwprop.c +++ b/gcc/tree-ssa-forwprop.c @@ -1773,7 +1773,7 @@ simplify_bitfield_ref (gimple_stmt_iterator *gsi) if (code == VEC_PERM_EXPR) { - tree p, m, index, tem; + tree p, m, tem; unsigned nelts; m = gimple_assign_rhs3 (def_stmt); if (TREE_CODE (m) != VECTOR_CST) @@ -1790,9 +1790,8 @@ simplify_bitfield_ref (gimple_stmt_iterator *gsi) p = gimple_assign_rhs2 (def_stmt); idx -= nelts; } - index = build_int_cst (TREE_TYPE (TREE_TYPE (m)), idx * size); tem = build3 (BIT_FIELD_REF, TREE_TYPE (op), - unshare_expr (p), op1, index); + unshare_expr (p), op1, bitsize_int (idx * size)); gimple_assign_set_rhs1 (stmt, tem); fold_stmt (gsi); update_stmt (gsi_stmt (*gsi)); -- 2.30.2