From 5f566ed4aba4d28328bb9fc55718e8dda25940bf Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 25 Sep 2018 05:34:30 +0100 Subject: [PATCH] use sv_insn_t class in instruction template --- riscv/insn_template.cc | 28 ++++++++++++++++++++++++---- riscv/sv_decode.h | 7 ++++--- 2 files changed, 28 insertions(+), 7 deletions(-) diff --git a/riscv/insn_template.cc b/riscv/insn_template.cc index 1e79326..354c0d9 100644 --- a/riscv/insn_template.cc +++ b/riscv/insn_template.cc @@ -2,20 +2,40 @@ #include "insn_template.h" -reg_t rv32_NAME(processor_t* p, insn_t insn, reg_t pc) +#ifdef SPIKE_SIMPLEV +#include "sv_decode.h" +#endif + +reg_t rv32_NAME(processor_t* p, insn_t s_insn, reg_t pc) { int xlen = 32; reg_t npc = sext_xlen(pc + insn_length(OPCODE)); + insn_bits_t bits = s_insn.bits(); +#ifdef SPIKE_SIMPLEV + sv_insn_t insn(bits); + #include "insns/NAME.h" + trace_opcode(p, OPCODE, s_insn); +#else + insn_t insn(bits); #include "insns/NAME.h" - trace_opcode(p, OPCODE, insn); + trace_opcode(p, OPCODE, s_insn); +#endif return npc; } -reg_t rv64_NAME(processor_t* p, insn_t insn, reg_t pc) +reg_t rv64_NAME(processor_t* p, insn_t s_insn, reg_t pc) { int xlen = 64; reg_t npc = sext_xlen(pc + insn_length(OPCODE)); + insn_bits_t bits = s_insn.bits(); +#ifdef SPIKE_SIMPLEV + sv_insn_t insn(bits); + #include "insns/NAME.h" + trace_opcode(p, OPCODE, s_insn); +#else + insn_t insn(bits); #include "insns/NAME.h" - trace_opcode(p, OPCODE, insn); + trace_opcode(p, OPCODE, s_insn); +#endif return npc; } diff --git a/riscv/sv_decode.h b/riscv/sv_decode.h index 0508de1..e8eee26 100644 --- a/riscv/sv_decode.h +++ b/riscv/sv_decode.h @@ -9,10 +9,11 @@ class sv_insn_t: public insn_t { public: + sv_insn_t(insn_bits_t bits) : insn_t(bits) {} uint64_t rd () { return remap(insn_t::rd()); } - uint64_t rs1() { return remap(insn_t::rs1(); } - uint64_t rs2() { return remap(insn_t::rs2(); } - uint64_t rs3() { return remap(insn_t::rs3(); } + uint64_t rs1() { return remap(insn_t::rs1()); } + uint64_t rs2() { return remap(insn_t::rs2()); } + uint64_t rs3() { return remap(insn_t::rs3()); } private: // remaps the register through the lookup table. // will need to take the current loop index/offset somehow -- 2.30.2