From 5f77b70dbf4764868d765a01a354c336ff9b4d4b Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Wed, 11 Mar 2020 04:38:50 +0000
Subject: [PATCH]

---
 3d_gpu/architecture.mdwn | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/3d_gpu/architecture.mdwn b/3d_gpu/architecture.mdwn
index 308725846..3a3ad030a 100644
--- a/3d_gpu/architecture.mdwn
+++ b/3d_gpu/architecture.mdwn
@@ -32,6 +32,10 @@ This means that in low clock rate modes the length of the whole pipeline may be
 
 The only reason why this ingenious and elegant trick (deployed first by IBM in the 1990s) can be considered is down to the fact that the 6600 Style Dependency Matrices do not care about actual completion time, they only care about availability of the result.
 
+# 6600 Engine
+
+TODO, see [[architecture/6600]]
+
 # Decoder
 
 TODO, see [[architecture/decoder]]
-- 
2.30.2