From 5f842aa5b66d19ecdbfa00315b48377abb005ba6 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Sun, 23 Dec 2012 10:01:40 +0000 Subject: [PATCH] r10k-cache-barrier-10.c: Make a branch-likely instruction more likely. gcc/testsuite/ * gcc.target/mips/r10k-cache-barrier-10.c: Make a branch-likely instruction more likely. From-SVN: r194705 --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c | 6 ++++++ 2 files changed, 11 insertions(+) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ed50045e74e..315fb0e01cc 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2012-12-23 Richard Sandiford + + * gcc.target/mips/r10k-cache-barrier-10.c: Make a branch-likely + instruction more likely. + 2012-12-23 Richard Sandiford * gcc.target/mips/pr55315.c: Cast to long rather than int. diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c index 1b8c6f4ab49..ad0d2b0491b 100644 --- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c +++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c @@ -9,6 +9,12 @@ unsigned char *bar (int); NOMIPS16 void foo (unsigned char *n) { + /* n starts in $4, but will be in $2 after the call to bar. + Encourage it to be in $2 on entry to the loop as well, + by doing some computation on it beforehand (D?ADDIU $2,$4,4). + dbr_schedule should then pull the *n load (L[WD] ...,0($2)) + into the delay slot. */ + n += 4; do n = bar (*n + 1); while (n); -- 2.30.2