From 5fb6beb473c1cc313feb60a9af24a63166d76dea Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 19 Feb 2015 10:26:34 +0100 Subject: [PATCH] enable RLE only in POST_HIT_RECORDING state (to ensure programmed offset is respected) --- litescope/core/storage.py | 5 ++++- litescope/frontend/la.py | 3 ++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/litescope/core/storage.py b/litescope/core/storage.py index 1bd67743..d1c8cb29 100644 --- a/litescope/core/storage.py +++ b/litescope/core/storage.py @@ -73,8 +73,9 @@ class LiteScopeRunLengthEncoder(LiteScopeRunLengthEncoderUnit, AutoCSR): def __init__(self, dw, length=1024): LiteScopeRunLengthEncoderUnit.__init__(self, dw, length) self._enable = CSRStorage() + self.external_enable = Signal(reset=1) ### - self.comb += self.enable.eq(self._enable.storage) + self.comb += self.enable.eq(self._enable.storage & self.external_enable) class LiteScopeRecorderUnit(Module): def __init__(self, dw, depth): @@ -89,6 +90,7 @@ class LiteScopeRecorderUnit(Module): self.length = Signal(bits_for(depth)) self.offset = Signal(bits_for(depth)) self.done = Signal() + self.post_hit = Signal() self.source = Source(data_layout(dw)) @@ -120,6 +122,7 @@ class LiteScopeRecorderUnit(Module): If(trigger_sink.stb & trigger_sink.hit, NextState("POST_HIT_RECORDING")) ) fsm.act("POST_HIT_RECORDING", + self.post_hit.eq(1), If(self.qualifier, fifo.sink.stb.eq(trigger_sink.stb & trigger_sink.hit & data_sink.stb) ).Else( diff --git a/litescope/frontend/la.py b/litescope/frontend/la.py index cd6499c2..16be1fac 100644 --- a/litescope/frontend/la.py +++ b/litescope/frontend/la.py @@ -59,7 +59,8 @@ class LiteScopeLA(Module, AutoCSR): self.submodules.rle = LiteScopeRunLengthEncoder(self.dw) self.comb += [ Record.connect(sink, self.rle.sink), - Record.connect(self.rle.source, self.recorder.data_sink) + Record.connect(self.rle.source, self.recorder.data_sink), + self.rle.external_enable.eq(self.recorder.post_hit) ] else: self.submodules.delay_buffer = Buffer(self.sink.description) -- 2.30.2