From 5fba1c4c6d7b9f54478ff92313a97865df0f44ad Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sun, 18 May 2008 19:00:00 +0200 Subject: [PATCH] revert: i386.c (ix86_secondary_reload): New static function. Revert: 2008-05-18 Uros Bizjak * config/i386/i386.c (ix86_secondary_reload): New static function. (TARGET_SECONDARY_RELOAD): New define. * config/i386/i386.h (SECONDARY_OUTPUT_RELOAD_CLASS): Remove. * config/i386/i386.md (reload_outqi): Remove. From-SVN: r135505 --- gcc/ChangeLog | 7 ------- gcc/config/i386/i386.c | 31 ------------------------------- gcc/config/i386/i386.h | 9 +++++++++ gcc/config/i386/i386.md | 19 +++++++++++++++++++ 4 files changed, 28 insertions(+), 38 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0e398e356a0..17a2632b75c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -3,13 +3,6 @@ * tree-cfg.c (verify_gimple_expr): Allow conversions from pointers to sizetype and vice versa. -2008-05-18 Uros Bizjak - - * config/i386/i386.c (ix86_secondary_reload): New static function. - (TARGET_SECONDARY_RELOAD): New define. - * config/i386/i386.h (SECONDARY_OUTPUT_RELOAD_CLASS): Remove. - * config/i386/i386.md (reload_outqi): Remove. - 2008-05-18 Xinliang David Li * gcc/tree-ssa-dce.c: Coding style fix. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 776d07a4466..af1e6c60b55 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -22023,34 +22023,6 @@ ix86_preferred_output_reload_class (rtx x, enum reg_class regclass) return regclass; } -static enum reg_class -ix86_secondary_reload (bool in_p, rtx x, enum reg_class class, - enum machine_mode mode, - secondary_reload_info *sri ATTRIBUTE_UNUSED) -{ - /* QImode spills from non-QI registers require - intermediate register on 32bit targets. */ - if (!in_p && mode == QImode && class == NON_Q_REGS - && !TARGET_64BIT) - { - int regno; - - if (REG_P (x)) - regno = REGNO (x); - else - regno = -1; - - if (regno >= FIRST_PSEUDO_REGISTER || GET_CODE (x) == SUBREG) - regno = true_regnum (x); - - /* Return Q_REGS if the operand is in memory. */ - if (regno == -1) - return Q_REGS; - } - - return NO_REGS; -} - /* If we are copying between general and FP registers, we need a memory location. The same is true for SSE and MMX registers. @@ -25906,9 +25878,6 @@ x86_builtin_vectorization_cost (bool runtime_test) #undef TARGET_FUNCTION_VALUE #define TARGET_FUNCTION_VALUE ix86_function_value -#undef TARGET_SECONDARY_RELOAD -#define TARGET_SECONDARY_RELOAD ix86_secondary_reload - #undef TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST #define TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST x86_builtin_vectorization_cost diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index f259d74d9d7..8516e53b41d 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1524,6 +1524,15 @@ enum reg_class ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \ : MODE) +/* QImode spills from non-QI registers need a scratch. This does not + happen often -- the only example so far requires an uninitialized + pseudo. */ + +#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \ + (((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS \ + || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode \ + ? Q_REGS : NO_REGS) + /* Return the maximum number of consecutive registers needed to represent mode MODE in a register of class CLASS. */ /* On the 80386, this is the size of MODE in words, diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index a021e7c75e7..145c373ff75 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1810,6 +1810,25 @@ ] (const_string "QI")))]) +(define_expand "reload_outqi" + [(parallel [(match_operand:QI 0 "" "=m") + (match_operand:QI 1 "register_operand" "r") + (match_operand:QI 2 "register_operand" "=&q")])] + "" +{ + rtx op0, op1, op2; + op0 = operands[0]; op1 = operands[1]; op2 = operands[2]; + + gcc_assert (!reg_overlap_mentioned_p (op2, op0)); + if (! q_regs_operand (op1, QImode)) + { + emit_insn (gen_movqi (op2, op1)); + op1 = op2; + } + emit_insn (gen_movqi (op0, op1)); + DONE; +}) + (define_insn "*swapqi_1" [(set (match_operand:QI 0 "register_operand" "+r") (match_operand:QI 1 "register_operand" "+r")) -- 2.30.2