From 5fdba8726e6cc44d83178acb275488883cd2cb9b Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Fri, 23 Jul 2010 15:45:08 +0200 Subject: [PATCH] *.c: Do not require sse{,2,3,4} effective target for compile-time only tests. * gcc.target/i386/*.c: Do not require sse{,2,3,4} effective target for compile-time only tests. * gcc.target/i386/pr39315-2.c: Remove redundant sse2 effective target check. * gcc.target/i386/pr39315-4.c: Ditto. * gcc.target/i386/vperm-v4si-1.c: Remove sse_runtime effective target check. Include sse-os-support.h. (main): Call check_isa and sse_os_support. * gcc.target/i386/vperm-v4sf-1.c: Ditto. * gcc.target/i386/vperm-v4si-2.c (main): Call check_isa. * gcc.target/i386/vperm-v4sf-2.c: Ditto. * gcc.target/i386/vperm-v2di.c: Remove sse2_runtime effective target check. Include sse-os-support.h. (main): Call check_isa and sse_os_support. * gcc.target/i386/vperm-v2df.c: Ditto. From-SVN: r162457 --- gcc/testsuite/ChangeLog | 22 +++++++++++++++++-- gcc/testsuite/gcc.target/i386/20020218-1.c | 1 - gcc/testsuite/gcc.target/i386/abi-1.c | 1 - gcc/testsuite/gcc.target/i386/all_one_m128i.c | 1 - gcc/testsuite/gcc.target/i386/fpcvt-1.c | 1 - gcc/testsuite/gcc.target/i386/fpcvt-2.c | 1 - gcc/testsuite/gcc.target/i386/fpcvt-3.c | 1 - gcc/testsuite/gcc.target/i386/funcspec-9.c | 1 - gcc/testsuite/gcc.target/i386/incoming-1.c | 1 - gcc/testsuite/gcc.target/i386/incoming-12.c | 1 - gcc/testsuite/gcc.target/i386/incoming-2.c | 1 - gcc/testsuite/gcc.target/i386/incoming-3.c | 1 - gcc/testsuite/gcc.target/i386/incoming-4.c | 1 - gcc/testsuite/gcc.target/i386/incoming-6.c | 1 - gcc/testsuite/gcc.target/i386/incoming-7.c | 1 - gcc/testsuite/gcc.target/i386/incoming-8.c | 1 - gcc/testsuite/gcc.target/i386/opt-1.c | 1 - gcc/testsuite/gcc.target/i386/opt-2.c | 1 - gcc/testsuite/gcc.target/i386/ordcmp-1.c | 1 - gcc/testsuite/gcc.target/i386/pr13366.c | 1 - gcc/testsuite/gcc.target/i386/pr17692.c | 2 +- gcc/testsuite/gcc.target/i386/pr18614-1.c | 1 - gcc/testsuite/gcc.target/i386/pr22152.c | 1 - gcc/testsuite/gcc.target/i386/pr23570.c | 1 - gcc/testsuite/gcc.target/i386/pr23575.c | 1 - gcc/testsuite/gcc.target/i386/pr26449-1.c | 1 - gcc/testsuite/gcc.target/i386/pr26600.c | 1 - gcc/testsuite/gcc.target/i386/pr27790.c | 1 - gcc/testsuite/gcc.target/i386/pr28839.c | 1 - gcc/testsuite/gcc.target/i386/pr30970.c | 1 - gcc/testsuite/gcc.target/i386/pr31486.c | 1 - gcc/testsuite/gcc.target/i386/pr32065-1.c | 1 - gcc/testsuite/gcc.target/i386/pr32280.c | 1 - gcc/testsuite/gcc.target/i386/pr32389.c | 1 - gcc/testsuite/gcc.target/i386/pr32661.c | 1 - gcc/testsuite/gcc.target/i386/pr32708-1.c | 1 - gcc/testsuite/gcc.target/i386/pr32961.c | 1 - gcc/testsuite/gcc.target/i386/pr33329.c | 1 - gcc/testsuite/gcc.target/i386/pr35714.c | 1 - gcc/testsuite/gcc.target/i386/pr35767-5.c | 1 - gcc/testsuite/gcc.target/i386/pr36222-1.c | 1 - gcc/testsuite/gcc.target/i386/pr36992-1.c | 1 - gcc/testsuite/gcc.target/i386/pr37101.c | 1 - gcc/testsuite/gcc.target/i386/pr37434-1.c | 1 - gcc/testsuite/gcc.target/i386/pr37434-2.c | 1 - gcc/testsuite/gcc.target/i386/pr37434-3.c | 1 - gcc/testsuite/gcc.target/i386/pr37434-4.c | 1 - gcc/testsuite/gcc.target/i386/pr38824.c | 1 - gcc/testsuite/gcc.target/i386/pr38931.c | 1 - gcc/testsuite/gcc.target/i386/pr39162.c | 1 - gcc/testsuite/gcc.target/i386/pr39315-1.c | 1 - gcc/testsuite/gcc.target/i386/pr39315-2.c | 1 - gcc/testsuite/gcc.target/i386/pr39315-3.c | 1 - gcc/testsuite/gcc.target/i386/pr39315-4.c | 1 - gcc/testsuite/gcc.target/i386/pr39496.c | 1 - gcc/testsuite/gcc.target/i386/pr39592-1.c | 1 - gcc/testsuite/gcc.target/i386/pr40957.c | 1 - gcc/testsuite/gcc.target/i386/pr42542-3a.c | 1 - gcc/testsuite/gcc.target/i386/pr43766.c | 1 - gcc/testsuite/gcc.target/i386/push-1.c | 1 - gcc/testsuite/gcc.target/i386/quad-sse.c | 1 - gcc/testsuite/gcc.target/i386/recip-divf.c | 1 - gcc/testsuite/gcc.target/i386/recip-sqrtf.c | 1 - .../gcc.target/i386/recip-vec-divf.c | 1 - .../gcc.target/i386/recip-vec-sqrtf.c | 1 - gcc/testsuite/gcc.target/i386/reload-1.c | 1 - gcc/testsuite/gcc.target/i386/sse-1.c | 1 - gcc/testsuite/gcc.target/i386/sse-15.c | 1 - gcc/testsuite/gcc.target/i386/sse-16.c | 1 - gcc/testsuite/gcc.target/i386/sse-19.c | 1 - gcc/testsuite/gcc.target/i386/sse-2.c | 2 +- gcc/testsuite/gcc.target/i386/sse-4.c | 1 - .../gcc.target/i386/sse-vect-types.c | 1 - gcc/testsuite/gcc.target/i386/sse2-unpack-1.c | 1 - gcc/testsuite/gcc.target/i386/ssefn-1.c | 1 - gcc/testsuite/gcc.target/i386/ssefn-2.c | 1 - gcc/testsuite/gcc.target/i386/ssefp-1.c | 1 - gcc/testsuite/gcc.target/i386/ssefp-2.c | 1 - gcc/testsuite/gcc.target/i386/sseregparm-1.c | 1 - gcc/testsuite/gcc.target/i386/sseregparm-3.c | 1 - gcc/testsuite/gcc.target/i386/sseregparm-4.c | 1 - gcc/testsuite/gcc.target/i386/sseregparm-5.c | 1 - gcc/testsuite/gcc.target/i386/sseregparm-6.c | 1 - gcc/testsuite/gcc.target/i386/sseregparm-7.c | 1 - gcc/testsuite/gcc.target/i386/ssetype-1.c | 1 - gcc/testsuite/gcc.target/i386/ssetype-2.c | 1 - gcc/testsuite/gcc.target/i386/ssetype-3.c | 1 - gcc/testsuite/gcc.target/i386/ssetype-4.c | 1 - gcc/testsuite/gcc.target/i386/ssetype-5.c | 1 - gcc/testsuite/gcc.target/i386/unordcmp-1.c | 1 - gcc/testsuite/gcc.target/i386/vecinit-1.c | 2 +- gcc/testsuite/gcc.target/i386/vecinit-2.c | 2 +- gcc/testsuite/gcc.target/i386/vecinit-3.c | 2 +- gcc/testsuite/gcc.target/i386/vecinit-4.c | 2 +- gcc/testsuite/gcc.target/i386/vecinit-5.c | 2 +- gcc/testsuite/gcc.target/i386/vecinit-6.c | 2 +- gcc/testsuite/gcc.target/i386/vectorize2.c | 1 - gcc/testsuite/gcc.target/i386/vectorize3.c | 1 - gcc/testsuite/gcc.target/i386/vectorize4.c | 1 - gcc/testsuite/gcc.target/i386/vectorize6.c | 1 - gcc/testsuite/gcc.target/i386/vectorize7.c | 1 - gcc/testsuite/gcc.target/i386/vectorize8.c | 1 - gcc/testsuite/gcc.target/i386/vperm-v2df.c | 7 +++++- gcc/testsuite/gcc.target/i386/vperm-v2di.c | 7 +++++- gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c | 7 +++++- gcc/testsuite/gcc.target/i386/vperm-v4sf-2.c | 2 ++ gcc/testsuite/gcc.target/i386/vperm-v4si-1.c | 7 +++++- gcc/testsuite/gcc.target/i386/vperm-v4si-2.c | 2 ++ gcc/testsuite/gcc.target/i386/xorps-sse.c | 1 - gcc/testsuite/gcc.target/i386/xorps-sse2.c | 1 - gcc/testsuite/gcc.target/i386/xorps.c | 1 - 111 files changed, 56 insertions(+), 110 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6bc8dd20c38..71b0ce74890 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,21 @@ +2010-06-23 Uros Bizjak + + * gcc.target/i386/*.c: Do not require sse{,2,3,4} effective target + for compile-time only tests. + * gcc.target/i386/pr39315-2.c: Remove redundant sse2 effective + target check. + * gcc.target/i386/pr39315-4.c: Ditto. + * gcc.target/i386/vperm-v4si-1.c: Remove sse_runtime effective + target check. Include sse-os-support.h. + (main): Call check_isa and sse_os_support. + * gcc.target/i386/vperm-v4sf-1.c: Ditto. + * gcc.target/i386/vperm-v4si-2.c (main): Call check_isa. + * gcc.target/i386/vperm-v4sf-2.c: Ditto. + * gcc.target/i386/vperm-v2di.c: Remove sse2_runtime effective + target check. Include sse-os-support.h. + (main): Call check_isa and sse_os_support. + * gcc.target/i386/vperm-v2df.c: Ditto. + 2010-06-23 Uros Bizjak * lib/target-supports.exp (check_avx_hw_available): New procedure. @@ -12,7 +30,7 @@ * gcc.target/i386/avx-check.h (main): Also check bit_OSXSAVE. - * gcc.dg/20020418-1.c: Do not require sse2 effective target + * gcc.dg/20020418-1.c: Do not require sse{,2} effective target for compile-time only test. * gcc.dg/pr32716.c: Ditto. * gcc.dg/pr34856.c: Ditto. @@ -27,7 +45,7 @@ * g++.dg/vect/vect.exp: Ditto. * gfortran.dg/vect/vect.exp: Ditto. - * gcc.dg/pr36584.c: Remove now redundant sse2 effective target check. + * gcc.dg/pr36584.c: Remove redundant sse{,2} effective target check. * gcc.dg/pr37544.c: Ditto. * gcc.dg/pr40550.c: Ditto. * gcc.dg/compat/union-m128-1_main.c: Ditto. diff --git a/gcc/testsuite/gcc.target/i386/20020218-1.c b/gcc/testsuite/gcc.target/i386/20020218-1.c index cbba7142132..13a835ed087 100644 --- a/gcc/testsuite/gcc.target/i386/20020218-1.c +++ b/gcc/testsuite/gcc.target/i386/20020218-1.c @@ -1,7 +1,6 @@ /* Verify that X86-64 only SSE registers aren't restored on IA-32. */ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse } */ /* { dg-options "-O2 -msse" } */ /* { dg-final { scan-assembler-not "xmm8" } } */ diff --git a/gcc/testsuite/gcc.target/i386/abi-1.c b/gcc/testsuite/gcc.target/i386/abi-1.c index 8a84ca140e1..62b80ef4062 100644 --- a/gcc/testsuite/gcc.target/i386/abi-1.c +++ b/gcc/testsuite/gcc.target/i386/abi-1.c @@ -1,7 +1,6 @@ /* Make certain that we pass V2DF in the correct register for SSE1. */ /* { dg-do compile } */ /* { dg-options "-O1 -msse -mno-sse2" } */ -/* { dg-require-effective-target sse } */ typedef double v2df __attribute__((vector_size (16))); v2df foo (void) { return (v2df){ 1.0, 2.0 }; } diff --git a/gcc/testsuite/gcc.target/i386/all_one_m128i.c b/gcc/testsuite/gcc.target/i386/all_one_m128i.c index 24d870fa37f..fa973e420ab 100644 --- a/gcc/testsuite/gcc.target/i386/all_one_m128i.c +++ b/gcc/testsuite/gcc.target/i386/all_one_m128i.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef long long __m128i __attribute__ ((__vector_size__ (16))); typedef int __v4si __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/fpcvt-1.c b/gcc/testsuite/gcc.target/i386/fpcvt-1.c index 5f09aedc53e..1c3b9b83453 100644 --- a/gcc/testsuite/gcc.target/i386/fpcvt-1.c +++ b/gcc/testsuite/gcc.target/i386/fpcvt-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -march=k8" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler-not "cvtss2sd" } } */ float a,b; main() diff --git a/gcc/testsuite/gcc.target/i386/fpcvt-2.c b/gcc/testsuite/gcc.target/i386/fpcvt-2.c index 317aa13b887..066d84365ed 100644 --- a/gcc/testsuite/gcc.target/i386/fpcvt-2.c +++ b/gcc/testsuite/gcc.target/i386/fpcvt-2.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -march=k8" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler-not "cvtss2sd" } } */ float a,b; main() diff --git a/gcc/testsuite/gcc.target/i386/fpcvt-3.c b/gcc/testsuite/gcc.target/i386/fpcvt-3.c index 70377c3d627..569d21a5aa7 100644 --- a/gcc/testsuite/gcc.target/i386/fpcvt-3.c +++ b/gcc/testsuite/gcc.target/i386/fpcvt-3.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -march=k8" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler-not "cvtss2sd" } } */ extern double fabs (double); float a,b; diff --git a/gcc/testsuite/gcc.target/i386/funcspec-9.c b/gcc/testsuite/gcc.target/i386/funcspec-9.c index 1c05f134ab5..78714e12417 100644 --- a/gcc/testsuite/gcc.target/i386/funcspec-9.c +++ b/gcc/testsuite/gcc.target/i386/funcspec-9.c @@ -1,7 +1,6 @@ /* Test whether using target specific options, we can generate FMA4 code. */ /* { dg-do compile } */ /* { dg-options "-O2 -march=k8 -mfpmath=sse -msse2" } */ -/* { dg-require-effective-target sse2 } */ extern void exit (int); diff --git a/gcc/testsuite/gcc.target/i386/incoming-1.c b/gcc/testsuite/gcc.target/i386/incoming-1.c index 9129ad00e17..86e98a79b47 100644 --- a/gcc/testsuite/gcc.target/i386/incoming-1.c +++ b/gcc/testsuite/gcc.target/i386/incoming-1.c @@ -1,7 +1,6 @@ /* PR middle-end/37009 */ /* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */ /* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/incoming-12.c b/gcc/testsuite/gcc.target/i386/incoming-12.c index b6bfa418d90..d7ef1038bb5 100644 --- a/gcc/testsuite/gcc.target/i386/incoming-12.c +++ b/gcc/testsuite/gcc.target/i386/incoming-12.c @@ -1,7 +1,6 @@ /* PR target/40838 */ /* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */ /* { dg-options "-w -mstackrealign -O2 -msse2 -mpreferred-stack-boundary=4" } */ -/* { dg-require-effective-target sse2 } */ typedef int v4si __attribute__ ((vector_size (16))); diff --git a/gcc/testsuite/gcc.target/i386/incoming-2.c b/gcc/testsuite/gcc.target/i386/incoming-2.c index 18451669612..2947d3347cd 100644 --- a/gcc/testsuite/gcc.target/i386/incoming-2.c +++ b/gcc/testsuite/gcc.target/i386/incoming-2.c @@ -1,7 +1,6 @@ /* PR middle-end/37009 */ /* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */ /* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/incoming-3.c b/gcc/testsuite/gcc.target/i386/incoming-3.c index bb9653a4067..1edbfda0b39 100644 --- a/gcc/testsuite/gcc.target/i386/incoming-3.c +++ b/gcc/testsuite/gcc.target/i386/incoming-3.c @@ -1,7 +1,6 @@ /* PR middle-end/37009 */ /* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */ /* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/incoming-4.c b/gcc/testsuite/gcc.target/i386/incoming-4.c index e1d1b751e7b..80c169c2469 100644 --- a/gcc/testsuite/gcc.target/i386/incoming-4.c +++ b/gcc/testsuite/gcc.target/i386/incoming-4.c @@ -1,7 +1,6 @@ /* PR middle-end/37009 */ /* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */ /* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */ -/* { dg-require-effective-target sse2 } */ #include #include diff --git a/gcc/testsuite/gcc.target/i386/incoming-6.c b/gcc/testsuite/gcc.target/i386/incoming-6.c index f6b64b7abd2..5cc4ab3f766 100644 --- a/gcc/testsuite/gcc.target/i386/incoming-6.c +++ b/gcc/testsuite/gcc.target/i386/incoming-6.c @@ -1,7 +1,6 @@ /* PR target/40838 */ /* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */ /* { dg-options "-w -mstackrealign -O2 -msse2 -mpreferred-stack-boundary=4" } */ -/* { dg-require-effective-target sse2 } */ typedef int v4si __attribute__ ((vector_size (16))); diff --git a/gcc/testsuite/gcc.target/i386/incoming-7.c b/gcc/testsuite/gcc.target/i386/incoming-7.c index fb5380490d6..cdd60379683 100644 --- a/gcc/testsuite/gcc.target/i386/incoming-7.c +++ b/gcc/testsuite/gcc.target/i386/incoming-7.c @@ -1,7 +1,6 @@ /* PR target/40838 */ /* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */ /* { dg-options "-w -mstackrealign -O2 -msse2 -mpreferred-stack-boundary=4" } */ -/* { dg-require-effective-target sse2 } */ typedef int v4si __attribute__ ((vector_size (16))); diff --git a/gcc/testsuite/gcc.target/i386/incoming-8.c b/gcc/testsuite/gcc.target/i386/incoming-8.c index 0f27af72078..2dd8800fd6c 100644 --- a/gcc/testsuite/gcc.target/i386/incoming-8.c +++ b/gcc/testsuite/gcc.target/i386/incoming-8.c @@ -1,7 +1,6 @@ /* PR target/40838 */ /* { dg-do compile { target { { ! *-*-darwin* } && ilp32 } } } */ /* { dg-options "-w -mstackrealign -O3 -msse2 -mpreferred-stack-boundary=4" } */ -/* { dg-require-effective-target sse2 } */ float foo (float f) diff --git a/gcc/testsuite/gcc.target/i386/opt-1.c b/gcc/testsuite/gcc.target/i386/opt-1.c index 74d3e8d1046..28e2ef38c34 100644 --- a/gcc/testsuite/gcc.target/i386/opt-1.c +++ b/gcc/testsuite/gcc.target/i386/opt-1.c @@ -2,7 +2,6 @@ whether we vectorize a simple loop. */ /* { dg-do compile } */ /* { dg-options "-O1 -msse2 -mfpmath=sse -march=k8" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "prefetcht0" } } */ /* { dg-final { scan-assembler "addps" } } */ /* { dg-final { scan-assembler "subss" } } */ diff --git a/gcc/testsuite/gcc.target/i386/opt-2.c b/gcc/testsuite/gcc.target/i386/opt-2.c index d247d71fc23..d2791e071c3 100644 --- a/gcc/testsuite/gcc.target/i386/opt-2.c +++ b/gcc/testsuite/gcc.target/i386/opt-2.c @@ -2,7 +2,6 @@ whether we vectorize a simple loop. */ /* { dg-do compile } */ /* { dg-options "-O1 -msse2 -mfpmath=sse -march=k8" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "prefetcht0" } } */ /* { dg-final { scan-assembler "addps" } } */ /* { dg-final { scan-assembler "subss" } } */ diff --git a/gcc/testsuite/gcc.target/i386/ordcmp-1.c b/gcc/testsuite/gcc.target/i386/ordcmp-1.c index 9be97e52b91..a136182aca9 100644 --- a/gcc/testsuite/gcc.target/i386/ordcmp-1.c +++ b/gcc/testsuite/gcc.target/i386/ordcmp-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "cmpordss" } } */ /* { dg-final { scan-assembler "cmpordps" } } */ /* { dg-final { scan-assembler "cmpordsd" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr13366.c b/gcc/testsuite/gcc.target/i386/pr13366.c index 569f1ad8e79..f0dce0b2402 100644 --- a/gcc/testsuite/gcc.target/i386/pr13366.c +++ b/gcc/testsuite/gcc.target/i386/pr13366.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O -msse" } */ -/* { dg-require-effective-target sse } */ #include diff --git a/gcc/testsuite/gcc.target/i386/pr17692.c b/gcc/testsuite/gcc.target/i386/pr17692.c index f8aed82750f..476d8e3de3f 100644 --- a/gcc/testsuite/gcc.target/i386/pr17692.c +++ b/gcc/testsuite/gcc.target/i386/pr17692.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O -mfpmath=sse -msse2" } */ -/* { dg-require-effective-target sse2 } */ + /* The fact that t1 and t2 are uninitialized is critical. With them uninitialized, the register allocator is free to put them in the same hard register, which results in diff --git a/gcc/testsuite/gcc.target/i386/pr18614-1.c b/gcc/testsuite/gcc.target/i386/pr18614-1.c index 6e16616cae6..1a499753760 100644 --- a/gcc/testsuite/gcc.target/i386/pr18614-1.c +++ b/gcc/testsuite/gcc.target/i386/pr18614-1.c @@ -1,7 +1,6 @@ /* PR rtl-optimization/18614 */ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef double v2df __attribute__ ((vector_size (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr22152.c b/gcc/testsuite/gcc.target/i386/pr22152.c index 4dce76cc947..d12597703ea 100644 --- a/gcc/testsuite/gcc.target/i386/pr22152.c +++ b/gcc/testsuite/gcc.target/i386/pr22152.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/pr23570.c b/gcc/testsuite/gcc.target/i386/pr23570.c index f220a8cb80d..1542663fa22 100644 --- a/gcc/testsuite/gcc.target/i386/pr23570.c +++ b/gcc/testsuite/gcc.target/i386/pr23570.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef float __v4sf __attribute__ ((__vector_size__ (16))); typedef float __m128 __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr23575.c b/gcc/testsuite/gcc.target/i386/pr23575.c index 1b0ec7f88c3..522226ef7a2 100644 --- a/gcc/testsuite/gcc.target/i386/pr23575.c +++ b/gcc/testsuite/gcc.target/i386/pr23575.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-msse2 -O2" } */ -/* { dg-require-effective-target sse2 } */ /* We used to ICE because of a bogous pattern. */ diff --git a/gcc/testsuite/gcc.target/i386/pr26449-1.c b/gcc/testsuite/gcc.target/i386/pr26449-1.c index e83375d6d0f..b4ef7804887 100644 --- a/gcc/testsuite/gcc.target/i386/pr26449-1.c +++ b/gcc/testsuite/gcc.target/i386/pr26449-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -mtune=k8" } */ -/* { dg-require-effective-target sse2 } */ typedef short __v8hi __attribute__ ((__vector_size__ (16))); typedef long long __m128i __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr26600.c b/gcc/testsuite/gcc.target/i386/pr26600.c index 61941de70e4..bbe0663da7e 100644 --- a/gcc/testsuite/gcc.target/i386/pr26600.c +++ b/gcc/testsuite/gcc.target/i386/pr26600.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O -ftree-vectorize -msse2" } */ -/* { dg-require-effective-target sse2 } */ void foo(int *p, int N) { diff --git a/gcc/testsuite/gcc.target/i386/pr27790.c b/gcc/testsuite/gcc.target/i386/pr27790.c index 4c5cdb6dc74..e8986c4158a 100644 --- a/gcc/testsuite/gcc.target/i386/pr27790.c +++ b/gcc/testsuite/gcc.target/i386/pr27790.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O -ftree-vectorize -msse2" } */ -/* { dg-require-effective-target sse2 } */ void binarize (int npixels, unsigned char *b) { diff --git a/gcc/testsuite/gcc.target/i386/pr28839.c b/gcc/testsuite/gcc.target/i386/pr28839.c index ccb715d7478..6a215164c58 100644 --- a/gcc/testsuite/gcc.target/i386/pr28839.c +++ b/gcc/testsuite/gcc.target/i386/pr28839.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -ftree-vectorize -funswitch-loops" } */ -/* { dg-require-effective-target sse2 } */ static int ready[10]; void abort (void); diff --git a/gcc/testsuite/gcc.target/i386/pr30970.c b/gcc/testsuite/gcc.target/i386/pr30970.c index 25f773915f8..96d64e5a962 100644 --- a/gcc/testsuite/gcc.target/i386/pr30970.c +++ b/gcc/testsuite/gcc.target/i386/pr30970.c @@ -1,6 +1,5 @@ /* { dg-do compile } /* { dg-options "-msse2 -O2 -ftree-vectorize" } */ -/* { dg-require-effective-target sse2 } */ #define N 256 int b[N]; diff --git a/gcc/testsuite/gcc.target/i386/pr31486.c b/gcc/testsuite/gcc.target/i386/pr31486.c index d9f251f3170..7082d3de98b 100644 --- a/gcc/testsuite/gcc.target/i386/pr31486.c +++ b/gcc/testsuite/gcc.target/i386/pr31486.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-msse -mno-sse2" } */ -/* { dg-require-effective-target sse } */ typedef double __v2df __attribute__ ((vector_size (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr32065-1.c b/gcc/testsuite/gcc.target/i386/pr32065-1.c index 951f252083b..eefea27f16a 100644 --- a/gcc/testsuite/gcc.target/i386/pr32065-1.c +++ b/gcc/testsuite/gcc.target/i386/pr32065-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-require-effective-target dfp } */ -/* { dg-require-effective-target sse } */ /* { dg-options "-msse -std=gnu99" } */ _Decimal128 test (void) diff --git a/gcc/testsuite/gcc.target/i386/pr32280.c b/gcc/testsuite/gcc.target/i386/pr32280.c index 49865ea4ba6..d48a635a4b8 100644 --- a/gcc/testsuite/gcc.target/i386/pr32280.c +++ b/gcc/testsuite/gcc.target/i386/pr32280.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef long long __m128i __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr32389.c b/gcc/testsuite/gcc.target/i386/pr32389.c index 511f0ca7292..24c27674cca 100644 --- a/gcc/testsuite/gcc.target/i386/pr32389.c +++ b/gcc/testsuite/gcc.target/i386/pr32389.c @@ -2,7 +2,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse } */ /* { dg-options "-msse" } */ double f1(); diff --git a/gcc/testsuite/gcc.target/i386/pr32661.c b/gcc/testsuite/gcc.target/i386/pr32661.c index 2eb1544e336..247ae131923 100644 --- a/gcc/testsuite/gcc.target/i386/pr32661.c +++ b/gcc/testsuite/gcc.target/i386/pr32661.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef int __v4si __attribute__ ((__vector_size__ (16))); typedef float __v4sf __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr32708-1.c b/gcc/testsuite/gcc.target/i386/pr32708-1.c index 5200f3f6547..c5308937bb0 100644 --- a/gcc/testsuite/gcc.target/i386/pr32708-1.c +++ b/gcc/testsuite/gcc.target/i386/pr32708-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef long long __v2di __attribute__ ((__vector_size__ (16))); typedef long long __m128i __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr32961.c b/gcc/testsuite/gcc.target/i386/pr32961.c index 8b513623111..a2326289af9 100644 --- a/gcc/testsuite/gcc.target/i386/pr32961.c +++ b/gcc/testsuite/gcc.target/i386/pr32961.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O0 -msse2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/pr33329.c b/gcc/testsuite/gcc.target/i386/pr33329.c index e8036082cf1..bb589ee2780 100644 --- a/gcc/testsuite/gcc.target/i386/pr33329.c +++ b/gcc/testsuite/gcc.target/i386/pr33329.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -ftree-vectorize -msse2" } */ -/* { dg-require-effective-target sse2 } */ extern void g (int *); diff --git a/gcc/testsuite/gcc.target/i386/pr35714.c b/gcc/testsuite/gcc.target/i386/pr35714.c index d5d2755ed07..13ca47c23a3 100644 --- a/gcc/testsuite/gcc.target/i386/pr35714.c +++ b/gcc/testsuite/gcc.target/i386/pr35714.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/pr35767-5.c b/gcc/testsuite/gcc.target/i386/pr35767-5.c index 9f533033b71..4372d2e5746 100644 --- a/gcc/testsuite/gcc.target/i386/pr35767-5.c +++ b/gcc/testsuite/gcc.target/i386/pr35767-5.c @@ -1,7 +1,6 @@ /* Test that we generate aligned load when memory is aligned. */ /* { dg-do compile } */ /* { dg-options "-O -msse2 -mtune=generic" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler-not "movups" } } */ /* { dg-final { scan-assembler "movaps" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr36222-1.c b/gcc/testsuite/gcc.target/i386/pr36222-1.c index 647e1039619..2d4c5b9b76c 100644 --- a/gcc/testsuite/gcc.target/i386/pr36222-1.c +++ b/gcc/testsuite/gcc.target/i386/pr36222-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__)); typedef int __v4si __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr36992-1.c b/gcc/testsuite/gcc.target/i386/pr36992-1.c index 017616bcc5b..7cd24cccf3e 100644 --- a/gcc/testsuite/gcc.target/i386/pr36992-1.c +++ b/gcc/testsuite/gcc.target/i386/pr36992-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/pr37101.c b/gcc/testsuite/gcc.target/i386/pr37101.c index 69b913c4103..8fd3bfc5f85 100644 --- a/gcc/testsuite/gcc.target/i386/pr37101.c +++ b/gcc/testsuite/gcc.target/i386/pr37101.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -ftree-vectorize -march=nocona" } */ -/* { dg-require-effective-target sse2 } */ typedef __SIZE_TYPE__ size_t; extern void *malloc (size_t); diff --git a/gcc/testsuite/gcc.target/i386/pr37434-1.c b/gcc/testsuite/gcc.target/i386/pr37434-1.c index 00ed55e3234..b556bf0848e 100644 --- a/gcc/testsuite/gcc.target/i386/pr37434-1.c +++ b/gcc/testsuite/gcc.target/i386/pr37434-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef short __v8hi __attribute__ ((__vector_size__ (16))); typedef long long __m128i __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr37434-2.c b/gcc/testsuite/gcc.target/i386/pr37434-2.c index b92d52100da..00ff9fd2e6c 100644 --- a/gcc/testsuite/gcc.target/i386/pr37434-2.c +++ b/gcc/testsuite/gcc.target/i386/pr37434-2.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mtune=core2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef short __v8hi __attribute__ ((__vector_size__ (16))); typedef long long __m128i __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr37434-3.c b/gcc/testsuite/gcc.target/i386/pr37434-3.c index 916c99fe02f..2cc597b04f5 100644 --- a/gcc/testsuite/gcc.target/i386/pr37434-3.c +++ b/gcc/testsuite/gcc.target/i386/pr37434-3.c @@ -1,5 +1,4 @@ /* { dg-do compile } */ -/* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -msse4.1" } */ typedef char __v16qi __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr37434-4.c b/gcc/testsuite/gcc.target/i386/pr37434-4.c index 15f8292b029..6848c63505e 100644 --- a/gcc/testsuite/gcc.target/i386/pr37434-4.c +++ b/gcc/testsuite/gcc.target/i386/pr37434-4.c @@ -1,5 +1,4 @@ /* { dg-do compile } */ -/* { dg-require-effective-target sse4 } */ /* { dg-options "-O2 -mtune=core2 -msse4.1" } */ typedef char __v16qi __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr38824.c b/gcc/testsuite/gcc.target/i386/pr38824.c index 11102f29ee2..637abfde888 100644 --- a/gcc/testsuite/gcc.target/i386/pr38824.c +++ b/gcc/testsuite/gcc.target/i386/pr38824.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse" } */ -/* { dg-require-effective-target sse } */ typedef float v4sf __attribute__ ((__vector_size__ (16))); diff --git a/gcc/testsuite/gcc.target/i386/pr38931.c b/gcc/testsuite/gcc.target/i386/pr38931.c index 96f9559686e..dd35dec7520 100644 --- a/gcc/testsuite/gcc.target/i386/pr38931.c +++ b/gcc/testsuite/gcc.target/i386/pr38931.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse" } */ -/* { dg-require-effective-target sse } */ typedef int __m64 __attribute__ ((__vector_size__ (8))); diff --git a/gcc/testsuite/gcc.target/i386/pr39162.c b/gcc/testsuite/gcc.target/i386/pr39162.c index 1a5e3e7aab0..2d114b8fd00 100644 --- a/gcc/testsuite/gcc.target/i386/pr39162.c +++ b/gcc/testsuite/gcc.target/i386/pr39162.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -mno-avx" } */ -/* { dg-require-effective-target sse2 } */ typedef long long __m256i __attribute__ ((__vector_size__ (32), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/pr39315-1.c b/gcc/testsuite/gcc.target/i386/pr39315-1.c index 9f4d484639f..16ba5d59fe4 100644 --- a/gcc/testsuite/gcc.target/i386/pr39315-1.c +++ b/gcc/testsuite/gcc.target/i386/pr39315-1.c @@ -1,7 +1,6 @@ /* PR middle-end/39315 */ /* { dg-do compile } */ /* { dg-options "-O -msse2 -mtune=generic" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler-not "movups" } } */ /* { dg-final { scan-assembler-not "movlps" } } */ /* { dg-final { scan-assembler-not "movhps" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr39315-2.c b/gcc/testsuite/gcc.target/i386/pr39315-2.c index ee74def2246..c1a3da75a36 100644 --- a/gcc/testsuite/gcc.target/i386/pr39315-2.c +++ b/gcc/testsuite/gcc.target/i386/pr39315-2.c @@ -1,7 +1,6 @@ /* PR middle-end/39315 */ /* { dg-do run } */ /* { dg-options "-O -msse2 -mtune=generic" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-require-effective-target sse2_runtime } */ /* { dg-additional-sources pr39315-check.c } */ diff --git a/gcc/testsuite/gcc.target/i386/pr39315-3.c b/gcc/testsuite/gcc.target/i386/pr39315-3.c index 38ea7aed745..07862db603a 100644 --- a/gcc/testsuite/gcc.target/i386/pr39315-3.c +++ b/gcc/testsuite/gcc.target/i386/pr39315-3.c @@ -1,7 +1,6 @@ /* PR middle-end/39315 */ /* { dg-do compile } */ /* { dg-options "-O -msse2 -mtune=generic" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler-not "movups" } } */ /* { dg-final { scan-assembler-not "movlps" } } */ /* { dg-final { scan-assembler-not "movhps" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr39315-4.c b/gcc/testsuite/gcc.target/i386/pr39315-4.c index 107933fa0c0..77258a7c76c 100644 --- a/gcc/testsuite/gcc.target/i386/pr39315-4.c +++ b/gcc/testsuite/gcc.target/i386/pr39315-4.c @@ -1,7 +1,6 @@ /* PR middle-end/39315 */ /* { dg-do run } */ /* { dg-options "-O -msse2 -mtune=generic" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-require-effective-target sse2_runtime } */ /* { dg-additional-sources pr39315-check.c } */ diff --git a/gcc/testsuite/gcc.target/i386/pr39496.c b/gcc/testsuite/gcc.target/i386/pr39496.c index bdaca2e55a8..e4132a1165b 100644 --- a/gcc/testsuite/gcc.target/i386/pr39496.c +++ b/gcc/testsuite/gcc.target/i386/pr39496.c @@ -1,7 +1,6 @@ /* PR target/39496 */ /* { dg-do compile { target { { i?86-*-linux* x86_64-*-linux* } && ilp32 } } } */ /* { dg-options "-O0 -fverbose-asm -fno-omit-frame-pointer -mtune=i686 -msse2 -mfpmath=sse" } */ -/* { dg-require-effective-target sse2 } */ /* Verify that {foo,bar}{,2}param are all passed on the stack, using normal calling conventions, when not optimizing. */ /* { dg-final { scan-assembler "\[^0-9-\]8\\(%ebp\\),\[^\n\]*fooparam," } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr39592-1.c b/gcc/testsuite/gcc.target/i386/pr39592-1.c index 65f3417854d..a7f37043bc5 100644 --- a/gcc/testsuite/gcc.target/i386/pr39592-1.c +++ b/gcc/testsuite/gcc.target/i386/pr39592-1.c @@ -2,7 +2,6 @@ 39592. */ /* { dg-do compile } */ /* { dg-options "-ansi -msse" } */ -/* { dg-require-effective-target sse } */ double foo (unsigned long var) diff --git a/gcc/testsuite/gcc.target/i386/pr40957.c b/gcc/testsuite/gcc.target/i386/pr40957.c index 56762d7e810..b7ee26dffcd 100644 --- a/gcc/testsuite/gcc.target/i386/pr40957.c +++ b/gcc/testsuite/gcc.target/i386/pr40957.c @@ -1,5 +1,4 @@ /* { dg-do compile } */ -/* { dg-require-effective-target avx } */ /* { dg-options "-O2 -mavx" } */ typedef int __v8si __attribute__((__vector_size__(32))); diff --git a/gcc/testsuite/gcc.target/i386/pr42542-3a.c b/gcc/testsuite/gcc.target/i386/pr42542-3a.c index 89c9ed4945b..754e59e8487 100644 --- a/gcc/testsuite/gcc.target/i386/pr42542-3a.c +++ b/gcc/testsuite/gcc.target/i386/pr42542-3a.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O1 -msse2 -ftree-vectorize" } */ -/* { dg-require-effective-target sse2 } */ #include "pr42542-3.c" diff --git a/gcc/testsuite/gcc.target/i386/pr43766.c b/gcc/testsuite/gcc.target/i386/pr43766.c index b9735a98b09..731b780ba6d 100644 --- a/gcc/testsuite/gcc.target/i386/pr43766.c +++ b/gcc/testsuite/gcc.target/i386/pr43766.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2" } */ /* { dg-options "-O2 -msse -mregparm=3" { target ilp32 } } */ -/* { dg-require-effective-target sse } */ void p (int *a, int i) { diff --git a/gcc/testsuite/gcc.target/i386/push-1.c b/gcc/testsuite/gcc.target/i386/push-1.c index 797ad575dd1..09464bf9229 100644 --- a/gcc/testsuite/gcc.target/i386/push-1.c +++ b/gcc/testsuite/gcc.target/i386/push-1.c @@ -1,6 +1,5 @@ /* { dg-do compile { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* { dg-options "-w -msse2 -Os" } */ -/* { dg-require-effective-target sse2 } */ typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__)); diff --git a/gcc/testsuite/gcc.target/i386/quad-sse.c b/gcc/testsuite/gcc.target/i386/quad-sse.c index 8c594452618..4b6fe792575 100644 --- a/gcc/testsuite/gcc.target/i386/quad-sse.c +++ b/gcc/testsuite/gcc.target/i386/quad-sse.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ __float128 x, y; diff --git a/gcc/testsuite/gcc.target/i386/recip-divf.c b/gcc/testsuite/gcc.target/i386/recip-divf.c index 5d2f1bedba9..b4447d33ac5 100644 --- a/gcc/testsuite/gcc.target/i386/recip-divf.c +++ b/gcc/testsuite/gcc.target/i386/recip-divf.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -ffast-math -msse -mfpmath=sse -mrecip" } */ -/* { dg-require-effective-target sse } */ float t1(float a, float b) { diff --git a/gcc/testsuite/gcc.target/i386/recip-sqrtf.c b/gcc/testsuite/gcc.target/i386/recip-sqrtf.c index a288cab17fe..859d2180a39 100644 --- a/gcc/testsuite/gcc.target/i386/recip-sqrtf.c +++ b/gcc/testsuite/gcc.target/i386/recip-sqrtf.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -ffast-math -msse -mfpmath=sse -mrecip" } */ -/* { dg-require-effective-target sse } */ extern float sqrtf (float); diff --git a/gcc/testsuite/gcc.target/i386/recip-vec-divf.c b/gcc/testsuite/gcc.target/i386/recip-vec-divf.c index 5cce7a631eb..4bdbba79f34 100644 --- a/gcc/testsuite/gcc.target/i386/recip-vec-divf.c +++ b/gcc/testsuite/gcc.target/i386/recip-vec-divf.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -ffast-math -ftree-vectorize -msse -mfpmath=sse -mrecip" } */ -/* { dg-require-effective-target sse } */ float a[16]; float b[16]; diff --git a/gcc/testsuite/gcc.target/i386/recip-vec-sqrtf.c b/gcc/testsuite/gcc.target/i386/recip-vec-sqrtf.c index d70cb705877..bcef700ec60 100644 --- a/gcc/testsuite/gcc.target/i386/recip-vec-sqrtf.c +++ b/gcc/testsuite/gcc.target/i386/recip-vec-sqrtf.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -ffast-math -ftree-vectorize -msse -mfpmath=sse -mrecip" } */ -/* { dg-require-effective-target sse } */ float a[16]; float b[16]; diff --git a/gcc/testsuite/gcc.target/i386/reload-1.c b/gcc/testsuite/gcc.target/i386/reload-1.c index 299871585e2..f8075acaed4 100644 --- a/gcc/testsuite/gcc.target/i386/reload-1.c +++ b/gcc/testsuite/gcc.target/i386/reload-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* { dg-options "-O3 -msse2 -fdump-rtl-csa" } */ /* { dg-skip-if "no stdint" { vxworks_kernel } } */ diff --git a/gcc/testsuite/gcc.target/i386/sse-1.c b/gcc/testsuite/gcc.target/i386/sse-1.c index c313a1f2307..afae22d3705 100644 --- a/gcc/testsuite/gcc.target/i386/sse-1.c +++ b/gcc/testsuite/gcc.target/i386/sse-1.c @@ -1,7 +1,6 @@ /* PR 12902 */ /* { dg-do compile } */ /* { dg-options "-O1 -msse" } */ -/* { dg-require-effective-target sse } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse-15.c b/gcc/testsuite/gcc.target/i386/sse-15.c index ed91ee65d38..5a1da7a755f 100644 --- a/gcc/testsuite/gcc.target/i386/sse-15.c +++ b/gcc/testsuite/gcc.target/i386/sse-15.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse -msse2" } */ -/* { dg-require-effective-target sse2 } */ /* Test that the intrinsics compile with optimization. These were not tested in i386-sse-[12].c because these builtins require immediate diff --git a/gcc/testsuite/gcc.target/i386/sse-16.c b/gcc/testsuite/gcc.target/i386/sse-16.c index c07df665d4c..e429630cbfb 100644 --- a/gcc/testsuite/gcc.target/i386/sse-16.c +++ b/gcc/testsuite/gcc.target/i386/sse-16.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O0 -msse" } */ -/* { dg-require-effective-target sse } */ typedef float __vr __attribute__ ((vector_size (16))); diff --git a/gcc/testsuite/gcc.target/i386/sse-19.c b/gcc/testsuite/gcc.target/i386/sse-19.c index 112c3e1cfad..43c090bd4e1 100644 --- a/gcc/testsuite/gcc.target/i386/sse-19.c +++ b/gcc/testsuite/gcc.target/i386/sse-19.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O3 -msse2" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "punpcklbw" } } */ extern void abort(); #include diff --git a/gcc/testsuite/gcc.target/i386/sse-2.c b/gcc/testsuite/gcc.target/i386/sse-2.c index 4dbc886c3d0..c2f3e0b17cd 100644 --- a/gcc/testsuite/gcc.target/i386/sse-2.c +++ b/gcc/testsuite/gcc.target/i386/sse-2.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O3 -msse" } */ -/* { dg-require-effective-target sse } */ + #include static const __m128 v_sign = {-.0f, -.0f, -.0f, -.0f}; static const __m128 v_half = {0.5f, 0.5f, 0.5f, 0.5f}; diff --git a/gcc/testsuite/gcc.target/i386/sse-4.c b/gcc/testsuite/gcc.target/i386/sse-4.c index 5d49884ab85..394ad9d7ec4 100644 --- a/gcc/testsuite/gcc.target/i386/sse-4.c +++ b/gcc/testsuite/gcc.target/i386/sse-4.c @@ -1,7 +1,6 @@ /* This testcase caused a buffer overflow in simplify_immed_subreg. */ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse-vect-types.c b/gcc/testsuite/gcc.target/i386/sse-vect-types.c index 2658f020eff..9cb6f3e07cd 100644 --- a/gcc/testsuite/gcc.target/i386/sse-vect-types.c +++ b/gcc/testsuite/gcc.target/i386/sse-vect-types.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O0 -msse2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse2-unpack-1.c b/gcc/testsuite/gcc.target/i386/sse2-unpack-1.c index ed067082594..a2676396cd3 100644 --- a/gcc/testsuite/gcc.target/i386/sse2-unpack-1.c +++ b/gcc/testsuite/gcc.target/i386/sse2-unpack-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ #include diff --git a/gcc/testsuite/gcc.target/i386/ssefn-1.c b/gcc/testsuite/gcc.target/i386/ssefn-1.c index 37bbf6f5eac..bea6cb2bf0b 100644 --- a/gcc/testsuite/gcc.target/i386/ssefn-1.c +++ b/gcc/testsuite/gcc.target/i386/ssefn-1.c @@ -3,7 +3,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse } */ /* { dg-final { scan-assembler "movss" } } */ /* { dg-final { scan-assembler "mulss" } } */ /* { dg-final { scan-assembler-not "movsd" } } */ diff --git a/gcc/testsuite/gcc.target/i386/ssefn-2.c b/gcc/testsuite/gcc.target/i386/ssefn-2.c index dfaacf6bdca..09b920ea7ca 100644 --- a/gcc/testsuite/gcc.target/i386/ssefn-2.c +++ b/gcc/testsuite/gcc.target/i386/ssefn-2.c @@ -3,7 +3,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "movss" } } */ /* { dg-final { scan-assembler "mulss" } } */ /* { dg-final { scan-assembler "movsd" } } */ diff --git a/gcc/testsuite/gcc.target/i386/ssefp-1.c b/gcc/testsuite/gcc.target/i386/ssefp-1.c index fdce233173b..621e362f490 100644 --- a/gcc/testsuite/gcc.target/i386/ssefp-1.c +++ b/gcc/testsuite/gcc.target/i386/ssefp-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -march=k8 -mfpmath=sse" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "maxsd" } } */ /* { dg-final { scan-assembler "minsd" } } */ double x; diff --git a/gcc/testsuite/gcc.target/i386/ssefp-2.c b/gcc/testsuite/gcc.target/i386/ssefp-2.c index 0b8b72262b5..a6caee398b2 100644 --- a/gcc/testsuite/gcc.target/i386/ssefp-2.c +++ b/gcc/testsuite/gcc.target/i386/ssefp-2.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -march=k8 -mfpmath=sse" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "maxsd" } } */ /* { dg-final { scan-assembler "minsd" } } */ double x; diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-1.c b/gcc/testsuite/gcc.target/i386/sseregparm-1.c index 946a24d210f..9d426b84276 100644 --- a/gcc/testsuite/gcc.target/i386/sseregparm-1.c +++ b/gcc/testsuite/gcc.target/i386/sseregparm-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse" } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse } */ float essef(float) __attribute__((sseregparm)); double essed(double) __attribute__((sseregparm)); diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-3.c b/gcc/testsuite/gcc.target/i386/sseregparm-3.c index 7475e4f827f..9ee82af44ae 100644 --- a/gcc/testsuite/gcc.target/i386/sseregparm-3.c +++ b/gcc/testsuite/gcc.target/i386/sseregparm-3.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-msse2 -O2" } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* Make sure we know that mysinfp returns in %xmm0. */ diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-4.c b/gcc/testsuite/gcc.target/i386/sseregparm-4.c index b8fc521264e..a29cf06bf5c 100644 --- a/gcc/testsuite/gcc.target/i386/sseregparm-4.c +++ b/gcc/testsuite/gcc.target/i386/sseregparm-4.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-msse2 -O2" } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* Make sure we know that mysinfp returns in %xmm0. */ diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-5.c b/gcc/testsuite/gcc.target/i386/sseregparm-5.c index fa41a2c87b9..7423722d694 100644 --- a/gcc/testsuite/gcc.target/i386/sseregparm-5.c +++ b/gcc/testsuite/gcc.target/i386/sseregparm-5.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-msse2 -O2" } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* Make sure we know that mysinfp returns in %xmm0. */ diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-6.c b/gcc/testsuite/gcc.target/i386/sseregparm-6.c index d0358c5e693..6203b6b5971 100644 --- a/gcc/testsuite/gcc.target/i386/sseregparm-6.c +++ b/gcc/testsuite/gcc.target/i386/sseregparm-6.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-msse2 -O2" } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* Make sure we know that mysinfp returns in %xmm0. */ diff --git a/gcc/testsuite/gcc.target/i386/sseregparm-7.c b/gcc/testsuite/gcc.target/i386/sseregparm-7.c index 99953b5aa9c..61267df9853 100644 --- a/gcc/testsuite/gcc.target/i386/sseregparm-7.c +++ b/gcc/testsuite/gcc.target/i386/sseregparm-7.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-msse2 -O2" } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* Make sure we know that mysinfp returns in %xmm0. */ diff --git a/gcc/testsuite/gcc.target/i386/ssetype-1.c b/gcc/testsuite/gcc.target/i386/ssetype-1.c index 00ea2857484..ef89059b8d8 100644 --- a/gcc/testsuite/gcc.target/i386/ssetype-1.c +++ b/gcc/testsuite/gcc.target/i386/ssetype-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* This test checks for absolute memory operands. */ /* { dg-require-effective-target nonpic } */ -/* { dg-require-effective-target sse2 } */ /* { dg-options "-O2 -msse2 -march=k8" } */ /* { dg-final { scan-assembler "andpd\[^\\n\]*magic" } } */ /* { dg-final { scan-assembler "andnpd\[^\\n\]*magic" } } */ diff --git a/gcc/testsuite/gcc.target/i386/ssetype-2.c b/gcc/testsuite/gcc.target/i386/ssetype-2.c index c6a8ba7b548..b68a63923fb 100644 --- a/gcc/testsuite/gcc.target/i386/ssetype-2.c +++ b/gcc/testsuite/gcc.target/i386/ssetype-2.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -march=k8" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "andpd" } } */ /* { dg-final { scan-assembler "andnpd" } } */ /* { dg-final { scan-assembler "xorpd" } } */ diff --git a/gcc/testsuite/gcc.target/i386/ssetype-3.c b/gcc/testsuite/gcc.target/i386/ssetype-3.c index 0e83e28c468..d6887d5cd20 100644 --- a/gcc/testsuite/gcc.target/i386/ssetype-3.c +++ b/gcc/testsuite/gcc.target/i386/ssetype-3.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* This test checks for absolute memory operands. */ /* { dg-require-effective-target nonpic } */ -/* { dg-require-effective-target sse2 } */ /* { dg-options "-O2 -msse2 -march=k8" } */ /* { dg-final { scan-assembler "andps\[^\\n\]*magic" } } */ /* { dg-final { scan-assembler "andnps\[^\\n\]*magic" } } */ diff --git a/gcc/testsuite/gcc.target/i386/ssetype-4.c b/gcc/testsuite/gcc.target/i386/ssetype-4.c index 9b68792390d..9994b07f21c 100644 --- a/gcc/testsuite/gcc.target/i386/ssetype-4.c +++ b/gcc/testsuite/gcc.target/i386/ssetype-4.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -march=k8" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "andps" } } */ /* { dg-final { scan-assembler "andnps" } } */ /* { dg-final { scan-assembler "xorps" } } */ diff --git a/gcc/testsuite/gcc.target/i386/ssetype-5.c b/gcc/testsuite/gcc.target/i386/ssetype-5.c index 098ed89ad66..75133e9fa68 100644 --- a/gcc/testsuite/gcc.target/i386/ssetype-5.c +++ b/gcc/testsuite/gcc.target/i386/ssetype-5.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* This test checks for absolute memory operands. */ /* { dg-require-effective-target nonpic } */ -/* { dg-require-effective-target sse2 } */ /* { dg-options "-O2 -msse2 -march=k8" } */ /* { dg-final { scan-assembler "pand\[^\\n\]*magic" } } */ /* { dg-final { scan-assembler "pandn\[^\\n\]*magic" } } */ diff --git a/gcc/testsuite/gcc.target/i386/unordcmp-1.c b/gcc/testsuite/gcc.target/i386/unordcmp-1.c index 85de4865d2f..49d4b8e076a 100644 --- a/gcc/testsuite/gcc.target/i386/unordcmp-1.c +++ b/gcc/testsuite/gcc.target/i386/unordcmp-1.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "cmpunordss" } } */ /* { dg-final { scan-assembler "cmpunordps" } } */ /* { dg-final { scan-assembler "cmpunordsd" } } */ diff --git a/gcc/testsuite/gcc.target/i386/vecinit-1.c b/gcc/testsuite/gcc.target/i386/vecinit-1.c index cba7429f242..fad0c07e100 100644 --- a/gcc/testsuite/gcc.target/i386/vecinit-1.c +++ b/gcc/testsuite/gcc.target/i386/vecinit-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ + #define vector __attribute__((vector_size(16))) float a; diff --git a/gcc/testsuite/gcc.target/i386/vecinit-2.c b/gcc/testsuite/gcc.target/i386/vecinit-2.c index fdfa837c698..a3a7abc5340 100644 --- a/gcc/testsuite/gcc.target/i386/vecinit-2.c +++ b/gcc/testsuite/gcc.target/i386/vecinit-2.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ + #define vector __attribute__((vector_size(16))) int a; diff --git a/gcc/testsuite/gcc.target/i386/vecinit-3.c b/gcc/testsuite/gcc.target/i386/vecinit-3.c index aae642ae27c..062fb1ed10a 100644 --- a/gcc/testsuite/gcc.target/i386/vecinit-3.c +++ b/gcc/testsuite/gcc.target/i386/vecinit-3.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ + #define vector __attribute__((vector_size(16))) char a; diff --git a/gcc/testsuite/gcc.target/i386/vecinit-4.c b/gcc/testsuite/gcc.target/i386/vecinit-4.c index 101b68badc4..2dfa29c4922 100644 --- a/gcc/testsuite/gcc.target/i386/vecinit-4.c +++ b/gcc/testsuite/gcc.target/i386/vecinit-4.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ + #define vector __attribute__((vector_size(16))) short a; diff --git a/gcc/testsuite/gcc.target/i386/vecinit-5.c b/gcc/testsuite/gcc.target/i386/vecinit-5.c index b9e7e27c78f..dcf8b9206aa 100644 --- a/gcc/testsuite/gcc.target/i386/vecinit-5.c +++ b/gcc/testsuite/gcc.target/i386/vecinit-5.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ + #define vector __attribute__((vector_size(16))) float a, b; diff --git a/gcc/testsuite/gcc.target/i386/vecinit-6.c b/gcc/testsuite/gcc.target/i386/vecinit-6.c index 3b22043273b..6817922d26b 100644 --- a/gcc/testsuite/gcc.target/i386/vecinit-6.c +++ b/gcc/testsuite/gcc.target/i386/vecinit-6.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2" } */ -/* { dg-require-effective-target sse2 } */ + #define vector __attribute__((vector_size(16))) int a, b; diff --git a/gcc/testsuite/gcc.target/i386/vectorize2.c b/gcc/testsuite/gcc.target/i386/vectorize2.c index a7196c70d13..41964871959 100644 --- a/gcc/testsuite/gcc.target/i386/vectorize2.c +++ b/gcc/testsuite/gcc.target/i386/vectorize2.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* { dg-options "-O2 -ffast-math -ftree-vectorize -msse2 -mfpmath=sse" } */ double a[256]; diff --git a/gcc/testsuite/gcc.target/i386/vectorize3.c b/gcc/testsuite/gcc.target/i386/vectorize3.c index e19f8d87bda..2947acbafda 100644 --- a/gcc/testsuite/gcc.target/i386/vectorize3.c +++ b/gcc/testsuite/gcc.target/i386/vectorize3.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* { dg-options "-O2 -ffast-math -ftree-vectorize -msse2 -mfpmath=sse" } */ float a[256]; diff --git a/gcc/testsuite/gcc.target/i386/vectorize4.c b/gcc/testsuite/gcc.target/i386/vectorize4.c index 9933d299729..f3d605e228a 100644 --- a/gcc/testsuite/gcc.target/i386/vectorize4.c +++ b/gcc/testsuite/gcc.target/i386/vectorize4.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ -/* { dg-require-effective-target sse2 } */ /* { dg-options "-O2 -ffast-math -ftree-vectorize -msse2 --param ggc-min-expand=0 --param ggc-min-heapsize=0" } */ /* This test, tests two thing, we vectorize square root and also we don't crash due to a GC issue. */ diff --git a/gcc/testsuite/gcc.target/i386/vectorize6.c b/gcc/testsuite/gcc.target/i386/vectorize6.c index 41e61aa2ccd..78ec53d15a8 100644 --- a/gcc/testsuite/gcc.target/i386/vectorize6.c +++ b/gcc/testsuite/gcc.target/i386/vectorize6.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -msse2 -ftree-vectorize -mveclibabi=svml -ffast-math" } */ -/* { dg-require-effective-target sse2 } */ double x[256]; diff --git a/gcc/testsuite/gcc.target/i386/vectorize7.c b/gcc/testsuite/gcc.target/i386/vectorize7.c index eca043bdfa2..10b7ba27868 100644 --- a/gcc/testsuite/gcc.target/i386/vectorize7.c +++ b/gcc/testsuite/gcc.target/i386/vectorize7.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -ftree-vectorize -msse2" } */ -/* { dg-require-effective-target sse2 } */ unsigned int a[256]; float b[256]; diff --git a/gcc/testsuite/gcc.target/i386/vectorize8.c b/gcc/testsuite/gcc.target/i386/vectorize8.c index e26362035ad..ed1517b93ef 100644 --- a/gcc/testsuite/gcc.target/i386/vectorize8.c +++ b/gcc/testsuite/gcc.target/i386/vectorize8.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-O2 -ftree-vectorize -msse2" } */ -/* { dg-require-effective-target sse2 } */ unsigned int a[256]; double b[256]; diff --git a/gcc/testsuite/gcc.target/i386/vperm-v2df.c b/gcc/testsuite/gcc.target/i386/vperm-v2df.c index 1a237f04b5d..40a51306fdc 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v2df.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v2df.c @@ -1,9 +1,9 @@ /* { dg-do run } */ /* { dg-options "-O -msse2" } */ /* { dg-require-effective-target sse2 } */ -/* { dg-require-effective-target sse2_runtime } */ #include "isa-check.h" +#include "sse-os-support.h" typedef double S; typedef double V __attribute__((vector_size(16))); @@ -26,6 +26,11 @@ extern int memcmp (const void *, const void *, __SIZE_TYPE__); int main() { + check_isa (); + + if (!sse_os_support ()) + exit (0); + i[0].s[0] = 0; i[0].s[1] = 1; i[0].s[2] = 2; diff --git a/gcc/testsuite/gcc.target/i386/vperm-v2di.c b/gcc/testsuite/gcc.target/i386/vperm-v2di.c index b587d90b8fb..8e300837da8 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v2di.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v2di.c @@ -1,9 +1,9 @@ /* { dg-do run } */ /* { dg-options "-O -msse2" } */ /* { dg-require-effective-target sse2 } */ -/* { dg-require-effective-target sse2_runtime } */ #include "isa-check.h" +#include "sse-os-support.h" typedef long long S; typedef long long V __attribute__((vector_size(16))); @@ -26,6 +26,11 @@ extern int memcmp (const void *, const void *, __SIZE_TYPE__); int main() { + check_isa (); + + if (!sse_os_support ()) + exit (0); + i[0].s[0] = 0; i[0].s[1] = 1; i[0].s[2] = 2; diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c b/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c index d8cb9e6b794..23608b3cf0a 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v4sf-1.c @@ -1,9 +1,9 @@ /* { dg-do run } */ /* { dg-options "-O -msse" } */ /* { dg-require-effective-target sse } */ -/* { dg-require-effective-target sse_runtime } */ #include "isa-check.h" +#include "sse-os-support.h" typedef float S; typedef float V __attribute__((vector_size(16))); @@ -28,6 +28,11 @@ extern int memcmp (const void *, const void *, __SIZE_TYPE__); int main() { + check_isa (); + + if (!sse_os_support ()) + exit (0); + i[0].s[0] = 0; i[0].s[1] = 1; i[0].s[2] = 2; diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4sf-2.c b/gcc/testsuite/gcc.target/i386/vperm-v4sf-2.c index 61b0d5a80dd..a0d49874f99 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v4sf-2.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v4sf-2.c @@ -27,6 +27,8 @@ extern int memcmp (const void *, const void *, __SIZE_TYPE__); int main() { + check_isa (); + i[0].s[0] = 0; i[0].s[1] = 1; i[0].s[2] = 2; diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c b/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c index 3c2717dd751..01b7c6fdab6 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v4si-1.c @@ -1,9 +1,9 @@ /* { dg-do run } */ /* { dg-options "-O -msse2" } */ /* { dg-require-effective-target sse2 } */ -/* { dg-require-effective-target sse2_runtime } */ #include "isa-check.h" +#include "sse-os-support.h" typedef int S; typedef int V __attribute__((vector_size(16))); @@ -28,6 +28,11 @@ extern int memcmp (const void *, const void *, __SIZE_TYPE__); int main() { + check_isa (); + + if (!sse_os_support ()) + exit (0); + i[0].s[0] = 0; i[0].s[1] = 1; i[0].s[2] = 2; diff --git a/gcc/testsuite/gcc.target/i386/vperm-v4si-2.c b/gcc/testsuite/gcc.target/i386/vperm-v4si-2.c index d77146896e4..43f88ee0935 100644 --- a/gcc/testsuite/gcc.target/i386/vperm-v4si-2.c +++ b/gcc/testsuite/gcc.target/i386/vperm-v4si-2.c @@ -27,6 +27,8 @@ extern int memcmp (const void *, const void *, __SIZE_TYPE__); int main() { + check_isa (); + i[0].s[0] = 0; i[0].s[1] = 1; i[0].s[2] = 2; diff --git a/gcc/testsuite/gcc.target/i386/xorps-sse.c b/gcc/testsuite/gcc.target/i386/xorps-sse.c index ab43ab713a3..e9c0a2e7395 100644 --- a/gcc/testsuite/gcc.target/i386/xorps-sse.c +++ b/gcc/testsuite/gcc.target/i386/xorps-sse.c @@ -1,7 +1,6 @@ /* Test that we generate xorps instruction when pxor is not available. */ /* { dg-do compile } */ /* { dg-options "-O -msse -mno-sse2" } */ -/* { dg-require-effective-target sse } */ /* { dg-final { scan-assembler "xorps\[ \t\]" } } */ #define vector __attribute__ ((vector_size (16))) diff --git a/gcc/testsuite/gcc.target/i386/xorps-sse2.c b/gcc/testsuite/gcc.target/i386/xorps-sse2.c index 4d3994c88ef..3c268b4cbaa 100644 --- a/gcc/testsuite/gcc.target/i386/xorps-sse2.c +++ b/gcc/testsuite/gcc.target/i386/xorps-sse2.c @@ -1,7 +1,6 @@ /* Test that we generate xorps when the result is used in FP math. */ /* { dg-do compile } */ /* { dg-options "-O -msse2 -mno-sse3" } */ -/* { dg-require-effective-target sse2 } */ /* { dg-final { scan-assembler "xorps\[ \t\]" { xfail *-*-* } } } */ /* { dg-final { scan-assembler-not "pxor" { xfail *-*-* } } } */ diff --git a/gcc/testsuite/gcc.target/i386/xorps.c b/gcc/testsuite/gcc.target/i386/xorps.c index bc2e97d76d6..6803a4d8916 100644 --- a/gcc/testsuite/gcc.target/i386/xorps.c +++ b/gcc/testsuite/gcc.target/i386/xorps.c @@ -1,6 +1,5 @@ /* { dg-do compile } */ /* { dg-options "-Os -msse2" } */ -/* { dg-require-effective-target sse2 } */ typedef float __m128 __attribute__ ((vector_size (16))); -- 2.30.2