From 5fe1068405aa4b19436dc4bd04a0a22e4df20e61 Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 20 Jul 2018 07:50:06 +0100
Subject: [PATCH] add mkslow_peripherals

---
 src/bsv/bsv_lib/slow_peripherals_template.bsv |  3 +-
 src/bsv/peripheral_gen.py                     | 31 ++++++++++++++++++-
 2 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/src/bsv/bsv_lib/slow_peripherals_template.bsv b/src/bsv/bsv_lib/slow_peripherals_template.bsv
index dd5d153..921ea0c 100644
--- a/src/bsv/bsv_lib/slow_peripherals_template.bsv
+++ b/src/bsv/bsv_lib/slow_peripherals_template.bsv
@@ -81,7 +81,8 @@ package slow_peripherals;
 	(*synthesize*)
 	module mkslow_peripherals#(Clock fast_clock, Reset fast_reset,
                                Clock uart_clock, Reset uart_reset
-  `ifdef PWM_AXI4Lite ,Clock ext_pwm_clock `endif )(Ifc_slow_peripherals);
+  `ifdef PWM_AXI4Lite ,Clock ext_pwm_clock `endif
+                              )(Ifc_slow_peripherals);
 		Clock sp_clock <-exposeCurrentClock; // slow peripheral clock
 		Reset sp_reset <-exposeCurrentReset; // slow peripheral reset
 
diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py
index de01427..1a86b70 100644
--- a/src/bsv/peripheral_gen.py
+++ b/src/bsv/peripheral_gen.py
@@ -37,6 +37,9 @@ class PBase(object):
             return tuple2(True,fromInteger(valueOf({2})));
         else""".format(bname, bend, name)
 
+    def mkslow_peripheral(self, name, ifacenum):
+        return ''
+
 
 class uart(PBase):
     def importfn(self):
@@ -49,6 +52,11 @@ class uart(PBase):
     def num_axi_regs32(self):
         return 8
 
+    def mkslow_peripheral(self):
+        return "            Uart16550_AXI4_Lite_Ifc uart{0} <- \n" + \
+               "                mkUart16550(clocked_by uart_clock,\n" + \
+               "                    reset_by uart_reset, sp_clock, sp_reset);"
+
 
 class rs232(PBase):
     def importfn(self):
@@ -61,6 +69,14 @@ class rs232(PBase):
     def num_axi_regs32(self):
         return 2
 
+    def mkslow_peripheral(self):
+        return "        //Ifc_Uart_bs uart{0} <-" + \
+               "        //       mkUart_bs(clocked_by uart_clock,\n" + \
+               "        //          reset_by uart_reset,sp_clock, sp_reset);" +\
+               "        Ifc_Uart_bs uart{0} <-" + \
+               "                mkUart_bs(clocked_by sp_clock,\n" + \
+               "                    reset_by sp_reset, sp_clock, sp_reset);"
+
 
 class twi(PBase):
     def importfn(self):
@@ -73,6 +89,9 @@ class twi(PBase):
     def num_axi_regs32(self):
         return 8
 
+    def mkslow_peripheral(self):
+        return "        I2C_IFC i2c{0} <- mkI2CController();"
+
 
 class qspi(PBase):
     def importfn(self):
@@ -85,6 +104,9 @@ class qspi(PBase):
     def num_axi_regs32(self):
         return 13
 
+    def mkslow_peripheral(self):
+        return "        Ifc_qspi qspi{0} <-  mkqspi();"
+
 
 class pwm(PBase):
     def importfn(self):
@@ -96,6 +118,10 @@ class pwm(PBase):
     def num_axi_regs32(self):
         return 4
 
+    def mkslow_peripheral(self):
+        return "        Ifc_PWM_bus pwm_bus <- mkPWM_bus(sp_clock);"
+
+
 
 class gpio(PBase):
     def importfn(self):
@@ -118,6 +144,10 @@ class gpio(PBase):
         (ret2, x) = PBase.axi_slave_idx(self, idx, "mux", ifacenum)
         return ("%s\n%s" % (ret, ret2), 2)
 
+    def mkslow_peripheral(self):
+        return "          MUX#({1}) mux{0} <- mkmux();\n" + \
+               "          GPIO#({1}) gpio{0} <- mkgpio();"
+
 
 axi_slave_declarations = """\
 typedef  0  SlowMaster;
@@ -164,7 +194,6 @@ class PeripheralIface(object):
             return ''
         return self.slow.axi_addr_map(self.ifacename, count)
 
-
 class PeripheralInterfaces(object):
     def __init__(self):
         pass
-- 
2.30.2