From 6037e2dd53b1b4cfc65f183144cbd3881364b8b7 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 1 Apr 2023 22:16:27 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls010.mdwn | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/openpower/sv/rfc/ls010.mdwn b/openpower/sv/rfc/ls010.mdwn index ec1d7e053..5df9ca336 100644 --- a/openpower/sv/rfc/ls010.mdwn +++ b/openpower/sv/rfc/ls010.mdwn @@ -721,15 +721,15 @@ use which remaps is here [[opcode_regs_deduped]]. **Please note the following**: ``` - Machine-readable CSV files have been provided which will make the task - of creating SV-aware ISA decoders, documentation, assembler tools + Machine-readable CSV files have been autogenerated which will make the + task of creating SV-aware ISA decoders, documentation, assembler tools compiler tools Simulators documentation all aspects of SVP64 easier and less prone to mistakes. Please avoid manual re-creation of - information from the written specification wording, and use the - CSV files or use the Canonical tool which creates the CSV files, - named sv_analysis.py. The information contained within sv_analysis.py - is considered to be part of this Specification, even encoded as it - is in python3. + information from the written specification wording in this chapter, + and use the CSV files or use the Canonical tool which creates the CSV + files, named sv_analysis.py. The information contained within + sv_analysis.py is considered to be part of this Specification, even + encoded as it is in python3. ``` The mappings are part of the SVP64 Specification in exactly the same -- 2.30.2