From 605608bae9626e3a9a034cd0a55eec317db9c2ee Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Thu, 30 Nov 2023 16:04:50 -0800 Subject: [PATCH] spr_cases: test writing to SRR0/1 using mtspr --- src/openpower/test/spr/spr_cases.py | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/openpower/test/spr/spr_cases.py b/src/openpower/test/spr/spr_cases.py index 838d9214..1fe0df65 100644 --- a/src/openpower/test/spr/spr_cases.py +++ b/src/openpower/test/spr/spr_cases.py @@ -6,6 +6,17 @@ from openpower.test.common import TestAccumulatorBase, skip_case class SPRTestCase(TestAccumulatorBase): + def case_mtspr_rfid(self): + lst = [ + "mtspr 26, 3", # SRR0 + "mtspr 27, 4", # SRR1 + "rfid" + ] + initial_regs = [0] * 32 + initial_regs[3] = 0x12345678 + initial_regs[4] = 0x9ABCDEF0 + self.add_case(Program(lst, bigendian), + initial_regs, expected=None) def case_1_mfspr(self): lst = ["mfspr 1, 26", # SRR0 @@ -159,4 +170,3 @@ class SPRTestCase(TestAccumulatorBase): # it changes due to counting time self.add_case(Program(lst, bigendian), initial_regs, initial_sprs, expected=None) - -- 2.30.2