From 6091b433d78be72dd7970fcd91822ae2b9db7a81 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Tue, 19 Sep 2000 23:21:36 +0000 Subject: [PATCH] Change the PLT entry 0 instruction sequence to actually work. --- bfd/ChangeLog | 7 +++++++ bfd/elf32-m68k.c | 8 ++++---- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 14896cc5c56..b3dc5cf3ecd 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,10 @@ +2000-09-19 Michael Sokolov + + * elf32-m68k.c (elf_cpu32_plt0_entry): Change the PLT entry 0 + instruction sequence to actually work. + (elf_m68k_finish_dynamic_sections): Change the patch-in offset + accordingly. + 2000-09-18 Alexandre Oliva * elf32-sh.c (sh_elf_relocate_section): Use diff --git a/bfd/elf32-m68k.c b/bfd/elf32-m68k.c index d53cfdf45a3..9b5e93f529e 100644 --- a/bfd/elf32-m68k.c +++ b/bfd/elf32-m68k.c @@ -224,11 +224,11 @@ static const bfd_byte elf_m68k_plt_entry[PLT_ENTRY_SIZE] = /* Procedure linkage table entries for the cpu32 */ static const bfd_byte elf_cpu32_plt0_entry[PLT_CPU32_ENTRY_SIZE] = { - 0x22, 0x7b, 0x01, 0x70, /* moveal %pc@(0xc), %a1 */ + 0x2f, 0x3b, 0x01, 0x70, /* move.l (%pc,addr),-(%sp) */ 0, 0, 0, 0, /* replaced with offset to .got + 4. */ - 0x4e, 0xd1, /* jmp %a1@ */ + 0x22, 0x7b, 0x01, 0x70, /* moveal %pc@(0xc), %a1 */ 0, 0, 0, 0, /* replace with offset to .got +8. */ - 0, 0, 0, 0, /* pad out to 24 bytes. */ + 0x4e, 0xd1, /* jmp %a1@ */ 0, 0, 0, 0, /* pad out to 24 bytes. */ 0, 0 }; @@ -2154,7 +2154,7 @@ elf_m68k_finish_dynamic_sections (output_bfd, info) (sgot->output_section->vma + sgot->output_offset + 8 - (splt->output_section->vma + 10)), - splt->contents + 10); + splt->contents + 12); elf_section_data (splt->output_section)->this_hdr.sh_entsize = PLT_CPU32_ENTRY_SIZE; } -- 2.30.2